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研究生:陳語
研究生(外文):Yu Chen
論文名稱:斜坡量測預測奈米微縮高介電係數閘極介電層的崩潰特性
論文名稱(外文):Ramping Metrology Projecting Breakdown Characteristics of Nano-scaled High-k Gate Dielectric
指導教授:黃恆盛黃恆盛引用關係陳雙源陳雙源引用關係
口試委員:劉傳璽王木俊
口試日期:2012-07-20
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:機電整合研究所
學門:工程學門
學類:機械工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:英文
論文頁數:61
中文關鍵詞:ramp rateHfO2TDDB高介電材料崩潰模型
外文關鍵詞:Weibull distributionHfO2Time-Dependent Dielectric Breakdown (TDDB)High-k dielectric
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由於CMOS元件的微縮,介電層的厚度也變得越來越薄,導致更大的漏電流及可靠度問題。因此,使用高介電係數介電層是不可避免的趨勢,而其中二氧化鉿(HfO2)為新世代的首選。近年來,利用以鉿(Hf)為基礎的閘極氧化層去跟氮做結合,已經被廣泛的使用,好處是它能增強熱穩定性、減少等效氧化層厚度(EOT)及改善崩潰特性。本篇研究即在探討以不同溫度和氮濃度退火對HfO2崩潰特性的影響。
實驗元件是聯華電子所提供28奈米模組製程的P型電容器(PMOS),二氧化鉿介電層製作方式為原子層沉積技術(ALD)。實驗考慮的製程參數為不同退火溫度和氮的含量,量測時使用不同的斜坡率、溫度條件,利用斜坡崩潰模型與量測所得資料結合,畫圖分析實驗結果與製程退火溫度和氮含量、不同量測溫度和斜坡率之間的關係。
研究結果顯示,在VRDB的測試條件下,對於不同製程的二氧化鉿介電層,崩潰電壓會如同斜坡崩潰模型所預測的趨勢,隨著溫度升高、斜坡率上升,崩潰電壓會下降。此外,PDA製程相對於DPN製程,擁有較大的崩潰電壓。而在DPN製程下,氮含量較多者崩潰電壓相對較高,製程溫度較高者崩潰電壓相對較低。


CMOS devices have been scaling and improving in order to reduce cost, promote performance, and possess multi-function. Owing to the shrinking of MOSFETs, the thickness of gate dielectric has become much thinner. However, the serious problems of leakage current and reliability due to the thinning oxide also appear. Therefore, using high-k gate dielectrics to replace SiO2 is unavoidable. Among many high-k materials, Hf-based dielectrics are considered as the leading high-k candidates with metal electrode for next generation of CMOS technology. In recent years, the combination of nitrogen in Hafnium-based gate oxide has generally used due to the augment in thermal stability, diminish in equivalent oxide thickness (EOT), and important of the breakdown characteristics. In this work, the breakdown characteristics of HfO2 dielectrics with different temperature and nitrogen concentration are investigated.
The PMOS experimental samples are fabricated from 28nm node high performance logic technology of UMC. In addition, the process of the dielectric layer was deposited by atomic layer deposition (ALD). The wafers were then annealed with different temperatures and nitrogen concentrations after ALD. The stress and measurement conditions in this research are performed at different ramp rates and temperatures. Then, ramp breakdown model is applied to fit with the measured data. Furthermore, the relations of breakdown characteristics under different processes, experiment temperatures, and ramp rates are also analyzed.
Under VRDB stress, the breakdown voltages of the dielectrics decreased as temperatures and ramp rates increased, which is consistent with the projection of the ramp breakdown model. Specifically, the breakdown voltage in PDA process is slightly larger than that in DPN process from our measurement data. For the samples through DPN processes, the higher concentrations of nitrogen have higher breakdown voltages and higher process temperatures have lower breakdown voltages.


Chapter 1 INTRODUCTION.....................................1
1.1 Research Background....................................1
1.2 Thesis Organization....................................2
Chapter 2 BASICS ABOUT THE BREAKDOWN CHARACTERISTICS.......3
2.1 The Replacement of SiO2................................3
2.2 Characteristics of HfO2 gate dielectrics...............5
2.3. The result of using decoupled plasma nitridation (DPN)5
2.4 Study of Breakdown.....................................9
2.4.1 Gate oxide dielectrics breakdown.....................9
2.4.1.1 Traps in Oxide....................................10
2.4.1.2 Theoretical base of breakdown.....................10
2.4.2 Breakdown emergence.................................13
2.4.2.1 The definitions of the various breakdowns.........13
2.4.2.2 The research of phenomenology.....................15
2.4.2.3 Statistical analysis..............................18
2.4.3 The Breakdown Model from C. Hu......................21
2.4.3.1 The acceleration of voltage and temperature.......21
2.4.3.2 Ramp breakdown....................................22
2.4.3.3 Model proof for SiO2 gate oxide...................23
2.5 Problem Formulation...................................29
Chapter 3 EXPERIMENTS.....................................30
3.1 Experimental Structures...............................30
3.2 Stress Condition and Measurement Conditions...........32
3.3 Experimental Structures Process.......................33
Chapter 4 RESULTS AND DISCUSSION..........................34
4.1 Model Prediction for HfO2 gate oxide..................34
4.2 Ramp breakdown for different gate oxide process.......39
4.2.1 The VRDB test for DPN at 700 ℃ with 8 % N2.........39
4.2.2 The VRDB test for DPN at 900 ℃ with 8 % N2.........41
4.2.3 The VRDB test for DPN at 700 ℃ with 16 % N2........44
4.2.4 The VRDB test for PDA at 700 ℃ with NH3............46
4.2.5 Summary for relationship of the VRDB................49
4.2.5.1 Test Results of Time Zero Breakdown...............49
Chapter 5 CONCLUSIONS AND FUTURE WORKS....................55
5.1 Conclusions...........................................55
5.2 Future works..........................................55
REFERENCES................................................57


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