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研究生:李元富
研究生(外文):Yuan-Fu Li
論文名稱:氫化非晶矽薄膜電晶體特性研究
論文名稱(外文):Investigation on the Characteristics of Hydrogenated Amorphous Silicon Thin Film Transistors
指導教授:陳雙源陳雙源引用關係
指導教授(外文):Shuang-Yuan Chen
口試委員:劉傳璽王木俊黃恆盛
口試委員(外文):Chuan-Hsi LiuMu-Chun WangHeng-Sheng Huang
口試日期:2012-07-20
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:機電整合研究所
學門:工程學門
學類:機械工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:英文
論文頁數:87
中文關鍵詞:氫化非晶矽薄膜電晶體頻率相依性缺陷能態密度退火遲滯
外文關鍵詞:a-Si:H TFTsfrequency dependencedensity of defect statesannealinghysteresis
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氫化非晶矽薄膜電晶體(a-Si:H TFTs),廣泛的應用在各式的平面顯示器中,雖然它的載子遷移率較低,但其製造成本低、大面積均勻性佳及製造程序成熟,是其仍被大量生產的優點。因此了解a-Si:H TFTs的基本元件物理是一件重要的事。過去文獻大多數探討a-Si:H TFTs的電流-電壓(I-V)特性,但對電容-電壓(C-V)特性的研究是較少的。在本論文中,我們同時研究a-Si:H TFTs的I-V與C-V特性。
本研究使用背通道蝕刻(BCE)逆交錯式(底部閘極式)的a-Si:H TFTs結構。在元件的量測方面,I-V特性使用Keithley 4200-SCS在不同溫度條件下進行量測,而C-V特性分別利用Agilent 4284與Agilent 4156量測。閘/源極間的電容(CGS)、閘/汲極間的電容(CGD)以及閘和源汲極間的電容(CG-SD)在不同頻率和溫度的條件下進行量測。另外透過I-V及C-V特性分析,來萃取元件的特性參數,也在本篇
論文中進一步探討。
經由研究發現,於較高溫度下的a-Si:H TFTs其I-V曲線萃取出來的元件參數皆獲得改善,其可能原因為熱能對元件的a-Si:H層退火,使矽斷鍵或已擴散的氫重新鍵結或與懸空鍵鍵結,另外在a-Si:H層中捕獲的載子也可能經退火被釋放出來導致特性變好。關於介面狀況,C-V曲線顯示出於較高溫度下,CGD僅水平地往閘極偏壓極性方向移動而CGS及CG-SD皆有曲線扭曲的現象發生,說明了於較高溫度下在絕緣層與a-Si:H層之間會產生介面能態;遲滯曲線迴圈顯示出絕緣層及與a-Si:H層介面中的陷入電荷會因溫度越高陷入電荷量越多。a-Si:H TFTs的電容不管CGS、CGD或CG-SD於閘極正偏壓下皆產生明顯頻率相依性,在低頻時電容曲線明顯比高頻時大,這是因為a-Si:H層的缺陷能態密度反應時間較長所導致。

The hydrogenated amorphous silicon thin film transistors(a-Si:H TFTs) are widely applied in a variety of flat panel displays. Although a-Si:H TFTs has lower carrier mobility, but it is still the most appropriate choice for mass production due to its advantage of low cost fabrication, excellent large area uniformity and a mature fabrication process. Therefore, it is important to understand the a-Si:H TFTs basic device physics. However, most of the previous literatures discussed about the current-voltage (I-V) characteristics, while the studied on capacitance-voltage(C-V) characteristics was only a few. In this thesis, we studied the a-Si:H TFTs not only I-V characteristics but also C-V characteristics.
Using back-channel-etched (BCE) inverted-staggered (bottom-gate) a-Si:H TFTs structure in our study, the I-V characteristics were measured by Keithley 4200-SCS on different temperatures, while the C-V characteristics were performed on Agilent 4284 or Agilent 4156. The C-V characteristics is investigated with gate to source capacitance (CGS), gate to drain capacitance (CGD), and gate to source/drain capacitance (CG-SD) on different frequencies and temperatures. In addition, through I-V and C-V characteristics analysis, how to extract device characteristic parameters are also discussed in our thesis.
Through this study, we found that when a-Si:H TFTs are stressed at high temperature, the a-Si:H TFTs performance become better. This may cause by annealing effect which activates the breaking of weak Si-Si bonds and Si-H bonds to re-bonding in a-Si:H layer. Another possible reason is the carriers which trapped into the defects in a-Si:H layer can be relaxed to channel leading to better performance. About the interface of a-Si:H active layer/gate insulator, the C-V curve of CGD only shows parallel shift toward the gate-bias direction, while the C-V curve of CGS and CG-SD both exhibit stretched out phenomena. These imply that there are charge trapping at CGD as well as the defects creation at CGS and CG-SD near a-Si:H active layer/gate insulator interface, especially at high temperature. The hysteresis loops of the C-V curves with increasing temperatures become increasingly wide which represent more trapped charges in the interface of a-Si:H active layer/gate insulator and inside the gate insulator layer. The capacitance of a-Si:H TFTs are showing significantly frequency dependence under positive gate bias regardless of the CGS, CGD, or CG-SD. These capacitance curves at low frequencies higher than high frequencies. This is caused by density of defect states in a-Si:H layer, because the variation in response time of various defects.

CONTENTS
ABSTRACT(Chinese)......................................i
ABSTRACT(English)......................................ii
ACKNOWLEDGEMENTS.......................................iv
CONTENTS...............................................v
LIST OF TABLES.........................................vii
LIST OF FIGURES........................................viii

Chapter 1 INTRODUCTION..............................................1
1.1 Research Background...................................1
1.2 Thesis Organization...................................2

Chapter 2 HYDROGENATED AMORPHOUS SILICON THIN FILM
TRANSISTORS (A-SI:H TFTS).......................3
2.1 Properties and Growth of a-Si:H Thin Film.............3
2.1.1 Atomic Structure and Defects in a-Si:H Thin Film....3
2.1.2 Density of States (DOS) of a-Si:H Thin Film.........8
2.1.3 Carrier Conduction Mechanism in a-Si:H Thin Film....12
2.1.4 Doping of a-Si:H Thin Film..........................15
2.1.5 Metastability of a-Si:H Thin Film...................21
2.1.6 Growth of Intrinsic and doped a-Si:H Thin Film......22
2.2 Properties and Growth of a-SiNx:H Thin Film...........27
2.2.1 Properties of a-SiNx:H Thin Film....................27
2.2.2 Growth of a-SiNx:H Thin Film........................31
2.3 The Structures of a-Si:H TFTs.........................32
2.4 The Operation and Physics of a-Si:H TFTs..............35
2.4.1 The Basic Operation of a-Si:H TFTs..................35
2.4.2 The Current-Voltage (I-V) Characteristics of a-Si:H
TFTs................................................36
2.4.3 The Capacitance-Voltage (C-V) Characteristics of
a-Si:H TFTs.........................................43

Chapter 3 EXPERIMENTAL DESIGNS............................46
3.1 Fabrication of a-Si:H TFTs............................46
3.2 Extraction of a-Si:H TFTs Parameters..................47
3.2.1 Extraction of the threshold voltage.................47
3.2.2 Extraction of the subthreshold swing............... 49
3.2.3 Extraction of the field-effect mobility.............49
3.2.4 Extraction of the on/off current ratio..............50
3.2.5 Extraction of the activation energy.................51
3.3 Measurement Conditions................................52

Chapter 4 RESULTS AND DISCUSSION..........................55
4.1 The I-V Characteristics...............................55
4.2 The C-V Characteristics...............................58
4.3 The Temperature Effect on a-Si:H TFTs.................64

Chapter 5 CONCLUSION AND FUTURE WORK......................78
5.1 Conclusion............................................78
5.2 Future Work...........................................79

REFERENCES................................................80

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