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研究生:李子康
研究生(外文):Zi-Kang Li
論文名稱:CMOS低雜訊放大器與收發開關之研製
論文名稱(外文):Implementation of CMOS Low Noise Amplifiers and T/R Switch
指導教授:王紳
口試委員:蔣孟儒蔡昆宏
口試日期:2012-06-30
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:電腦與通訊研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:英文
論文頁數:51
中文關鍵詞:單刀雙擲開關X-Band低雜訊放大器變壓器
外文關鍵詞:SPDTSwitchX-bandLow-Noise Amplifiers (LNA)Transformer
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本篇論文的第一個部份描述一個寬頻單刀雙擲開關的設計與量測。電路設計由CMOS製程來實現低成本與高度整合的優勢。這個單刀雙擲開關的頻寬為6~30 GHz
,中心頻率18 GHz,插入損耗(IL)小於3 dB,與大於32 dB的隔絕度,線性度(P1dB)為22 dBm ±1dBm。於台積電0.18-μm 1P6M CMOS製程實現所設計的電路。晶片面積為0.476 mm2。
本篇論文的第二部份描述應用在X頻帶系統中的低雜訊放大器之分析與設計。X頻帶的低雜訊放大器需具備有寬頻、低功率、增益平坦的特性,為了達到寬頻與低雜訊的目標,利用多級的概念來設計,並且選擇採用共源級做為第一級放大,與兩個共源級作為最後一級。這個寬頻低雜訊放大器的頻寬為8 ~ 12 GHz,增益為14 dB ±1dB,雜訊指數最低 2.8 dBm,消耗功率為9.78 mW。最後的硬體實現是使用台積電0.18-μm 1P6M CMOS 製程;其晶片大小為 0.476mm2。


The first part of the thesis describes design and measurement of a wideband single-pole double-throw (SPDT) switch. The circuit design based on CMOS technology achieves the advantages of low cost and high integration capability. The bandwidth of the SPDT switch ranges from 6 to 30 GHz centered at 18 GHz. The insertion loss is less than 2 dB, and the isolation is better than 32 dB. The P1dB is 22 dBm ± 1 dBm. The implementation of the designed circuit is based on TSMC 0.18-μm CMOS 1P6M process. The overall chip size is 0.476 mm2.
The second part of the thesis describes the design and analysis of a low-noise amplifier for X-Band system. The features of the LNAs are wide bandwidth, low power consumption and flatness of gain. In order to get wide bandwidth and low noise, we utilize the concept of multi-stages to design this circuit. The first stage is a common source topology and two common source amplifiers in the second stage. The bandwidth of the LNA ranges from 8 GHz to 12 GHz. The gain is 14 dB ± 1 dB. The minimum noise figure is 2.8 dB and the power consumption is 9.78 mW. Finally, the circuit is implemented with TSMC 0.18-μm CMOS 1P6M process with a chip size of 0.464 mm2.


Contents
摘要 I
Abstract II
Contents IV
List of Figures VI
List of Tables VIII
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Thesis Origination 1
Chapter 2 Principle and Analysis of Switch 3
2.1 Switch Introduction 3
2.2 Principle of Switch 3
2.2.1 PIN Diodes 5
2.2.2 MOS Devices 6
2.3 Body-floating Technology 9
2.4 Basic switch Architecture 13
Chapter 3 A 6-30 GHz Broadband T/R Switch in the 0.18um CMOS Process 16
3.1 Circuit Design 17
3.2 Measured and Simulated Results 23
Chapter 4 Design and Analysis of LNA 27
4.1 Introduction of Low Noise Amplifier 27
4.2 Analysis of Noise Source [1][27][28] 27
4.2.1 Flicker noise 28
4.2.2 Distributed gate resistance noise 29
4.2.3 Channel thermal noise 29
4.2.4 Shot noise 31
4.2.5 Induced gate current noise 31
4.3 Noise Figure of Cascaded Stages 32
4.4 Basic of Transformers 34
4.5 Circuit Design 36
4.6 Input and output Impedance Matching Analysis 38
4.7 Simulated and Measured Results 41
Chapter 5 Conclusion 47
Reference 48



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