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研究生:黃毓陞
研究生(外文):Yu-Sheng Huang
論文名稱:無探針式測試系統設計
論文名稱(外文):Design of Probeless IC Testing System
指導教授:邱弘緯邱弘緯引用關係
口試委員:許晉瑋陳筱青黃國威黃育賢
口試日期:2012-07-17
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:電腦與通訊研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:135
中文關鍵詞:非接觸式能量傳輸系統晶片晶圓測試
外文關鍵詞:Contactless power transmissionSystem on ChipWafer Probing
相關次數:
  • 被引用被引用:6
  • 點閱點閱:144
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  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
本論文使用串聯諧振網路將能量以電磁耦合原理傳遞,透過無線方式將能量傳至接收晶片以達到無探針式測試。
無探針式測試系統可分為發射端與接收晶片兩個部分,在發射端部分使用E類功率放大器將能量放大以及匹配網路使傳能效率最佳化,並使用積體電路U2270B將接收晶片回傳資料還原;在接收系統晶片部分使用TSMC 0.18μm 1P6M CMOS製程製作,系統晶片包含整流器、低壓降線性穩壓器、振幅偏移解調器、負載偏移調變器、八位元連續漸近式類比數位轉換器以及邏輯控制器。
無探針式測試系統可測試類比與數位訊號,使用單一頻率作為通道完成半雙工資料傳輸,資料使用前四位元檢測,中間八位元傳送訊號,後面四位元結束位元封包方式傳送,並利用邏輯控制器判別發射訊號是否傳送正確測試指令達到致能功能。
本論文現階段以測試一個半加器為雛型,經量測結果得知此方法可行性極高,未來可應用於大型系統晶片測試,使晶圓測試成本大幅度降低。

This thesis is the basic principle of electromagnetic coupling, using a series resonant network to transfer energy, the energy transfer wirelessly to the receiver chip to achieve probeless testing.
The system can be divided into two parts: the transmitter and receiver chip. In transmitter part, a Class-E power amplifier which enlarge the energy and matching network makes the energy transfer efficiency optimization. Data restore uses integrated circuit U2270B to transfer chip information; The chip is fabricated by TSMC 0.18μm 1P6M CMOS technology, including the rectifier, the low-dropout voltage regulator, the amplitude-shift keying demodulator, the load-shift keying modulator, the 8-bit successive-approximation-register analog-to-digital converters and the logic controller.
The system can test both analog and digital signals by using a single frequency channel to complete the half-duplex data transmission. Transferred data is packaged as the first four parity check bits, the middle of eight main signal bits and the last four stop bits. The logic controller to distinguish the emission signal whether or not send a test command to achieve enable function.
At the present stage, this thesis measures a half adder as prototype, by measurement results show that the feasibility of this method is high. In the future, it can be application in larger chip testing. Via this method, the cost of wafer probing will be decreasing.

摘要 i
ABSTRACT ii
致謝 iv
目錄 v
圖目錄 viii
表目錄 xv
第一章 緒論 1
1.1 研究動機 1
1.2 研究背景 3
1.3 論文架構 6
第二章 無探針式測試系統晶片設計 7
2.1 系統晶片子電路功能介紹 7
2.2 主動開關切換式全波整流器 9
2.2.1 整流器簡介 9
2.2.2 橋式全波整流器 13
2.2.3 濾波電容 22
2.3 低壓降線性穩壓器 24
2.3.1 線性穩壓器的規格與專有名詞定義 25
2.3.2 參考電壓電路 29
2.3.3 低壓降線性穩壓器設計 34
2.3.4 低壓線性穩壓器模擬 41
2.4 調變與解調器 45
2.4.1 寬頻調變技術 45
2.4.2 調變器與解調器選用 47
2.4.3 振幅偏移解調器與負載偏移調變器模擬 52
2.5 連續漸近式類比數位轉換器 55
2.5.1 類比數位轉換器架構比較 55
2.5.2 類比數位轉換器之特性與參數 56
2.5.3 連續漸近式類比數位轉換器 60
2.6 邏輯控制器 74
2.6.1 參考時脈還原電路 74
2.6.2 參考時脈還原電路模擬 76
2.6.3 邏輯控制器 77
2.6.4 邏輯控制器模擬 80
2.7 無探針式測試系統晶片模擬 81
第三章 無探針式測試發射模組 84
3.1 E類功率放大器 84
3.1.1 E類功率放大器簡介 85
3.1.2 E類功率放大器模擬 89
3.1.3 E類功率放大器製作與量測 92
3.2 匹配網路 97
3.2.1 匹配網路設計與模擬 98
3.2.2 匹配網路製作與量測 100
3.3 振幅偏移解調電路 102
3.3.1 U2270B振幅偏移解調電路應用與佈局 103
3.3.2 U2270B振幅偏移解調電路量測 105
3.4 無探針式測試發射模組 106
第四章 無探針式測試系統量測 108
4.1 系統晶片電路佈局 108
4.2 系統晶片量測整合印刷電路板 110
4.3 低壓降線性穩壓器量測 111
4.3.1 線性調節率 111
4.3.2 電源拒斥比 112
4.4 整流器量測 114
4.5 振幅偏移解調器量測 115
4.6 負載偏移調變器量測 116
4.7 邏輯控制器量測 117
4.7.1 史密特處發器 117
4.7.2 邏輯控制器 118
4.8 連續漸近式類比數位轉換器量測 120
4.9 類比數位轉換器應用於無線電力耦合之探討 122
4.9.1 研究緣由與目的 122
4.9.2 系統晶片量測 123
4.10 無探針式測試系統量測 126
第五章 結論與未來展望 129
5.1 前期工作 129
5.2 結論 130
5.3 未來展望 131
參考文獻 132
附錄A TSMC 0.18μm 1P6M CMOS製程電容 135


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