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研究生:劉環瑀
論文名稱:在SOPC系統上使用Census Transform實現嵌入式立體視覺
論文名稱(外文):Embedded Stereo Vision on an SOPC System Using Census Transform
指導教授:陳啟鏘
指導教授(外文):Chichyang Chen
口試委員:劉堂傑林立謙
口試日期:2013-07-23
學位類別:碩士
校院名稱:逢甲大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:中文
論文頁數:52
中文關鍵詞:立體視覺
外文關鍵詞:Census Transform
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立體視覺能計算三維真實世界的深度資訊,藉由兩張或以上不同視角的2D影像,可以找出深度資訊,但是立體視覺在計算深度資訊的過程,不斷地重複找尋對應點,計算量非常龐大,若是在嵌入式系統中實現這樣的技術,在有限的記憶體與較差的處理器效能的環境下,將會成為一個具有挑戰性的問題。
Census Transform是立體視覺的區域方法(Local Method)的一種,演算法是以視窗為基礎(window-based),強調簡單的比對、對光度失真的敏感度較低、動態的視窗大小,適合實作在嵌入式的FPGA上。SOPC系統擁有豐富的硬體資源,可以彈性地設計系統的架構;軟體的複雜指令,則設計客製化指令,將會有效地增整體系統的效能。
本研究之主旨,是將Census Transform演算法,透過SOPC系統加入硬體元件到Altera FPGA上,在SOPC系統建置的硬體架構下,使用客製化指令設計,針對軟體的函式加速,期望在精準度與效能之間得到最好的加速結果。
本研究之實作是以Altera DE2-70開發板為平台,運用SOPC系統建構本系統。分別實作純軟體架構、加入客製化指令,比較兩種方法的執行時間。在加入客製化指令後,達到整體效能提升三倍,驗證純軟體與客製化指令所提升的效能。
Stereo vision can be used to compute the depth information in 3D world with different views of 2D images. In depth computation, we have to find the corresponding points in the few images, which is a repeated and very time-consuming task. Implementing stereo vision in an embedded system with limited memory and lowered processor is a challenge problem. Census Transform, which is a local method of stereo vision, is devoted to implement the correspondence problem. The algorithm of Census Transform is window-based. The advantages of Census Transform are simple comparison, less light intensity distortion, and dynamic window size. It’s suitable to be implemented on an embedding system. There are many hardware resources on SOPC (System-On -Programmable-chip). It can design hardware architecture flexibly. Therefore, we design a custom instruction to perform the complex computation of software, which improves the speed of system effectively.
The purpose of this thesis is to design a stereo vision system on an SOPC system by adding hardware component to improve the system performance. The hardware component is added through designing custom instruction that can perform complex arithmetic operations in depth extraction, without sacrificing system precision. The SOPC system is implemented on an Altera DE2-70 board. From our experimental results, the system with custom instruction is about three time faster than the system with pure software implementation.
誌謝 i
摘要 ii
Abstract iii
目錄 iv
圖目錄 v
表目錄 vii
第一章 研究計畫之動機及目的 0
1.1 研究背景與動機 1
1.2 研究問題與方法 2
1.3 論文架構 3
第二章 立體視覺 4
2.1 立體視覺分類介紹 4
2.2 Census Transform演算法 17
2.3深度計算原理 19
第三章 Altera SOPC系統架構 11
3.1 Altera SOPC系統 11
3.2 Memory介紹 12
3.3 Avalon Bus介紹 17
3.4 Nios II嵌入式軟體處理器 18
3.5客製化指令介紹 19
第四章 系統架構與實作 23
4.1系統架構介紹 23
4.2 SDCARD影像讀取 17
4.3軟體實作介紹 18
第五章 客製化指令設計 30
5.1 軟體立體視覺步驟分析 30
5.2 客製化指令設計 32
第六章 實驗結果與分析 30
6.1 實驗方法 30
6.2 實驗結果 32
第七章 結論與期望成果 36
參考文獻 42
[1] S. Jin, J. Cho, X. D. Pham, K. M. Lee, S.-K. Park, M. Kim, and J. W. Jeon
&;quot;FPGA Design and Implementation of a Real-Time Stereo Vision System, &;quot;IEEE Trans. Circuits and Systems for Video Technology, vol. 20, no. 1, Jan. 2010.
[2] Takaya, K. and Zheng Qian, &;quot;FPGA Based Stereo Vision System to Display
Disparity Map in Realtime,&;quot; 2012 International Conf. Information Science and Applications (ICISA), pp.1-4, May. 2012.
[3] Ohmura. I, Mitamura. T, Takauji. H, and Kaneko. S, &;quot;A Real-time Stereo
Vision Sensor based on FPGA realization of Orientation Code Matching,&;quot; 2010 International Symposium on Optomechatronic Technologies (ISOT), pp.1-5, Oct. 2010.
[4] Wade S. Fife and James K. Archibald, &;quot;Improved Census Transforms
for Resource-Optimized Stereo Vision, &;quot;IEEE Trans. Circuits and Systems for Video Technology, vol. 23, pp. 60-73, Jan. 2013.
[5] Embedded System Design Using FPGAs,March 2013,URL:
http://www.smdp.iitkgp.ernet.in/PDF%5CVLSI_DSP%5CEmbedded_System
_Design.pdf
[6] L. Nalpantidis, G. C. Sirakoulis, and A. Gasteratos, “Review of stereo vision
algorithms: from software to hardware,” International Journal of
Optomechatronics, vol. 2, no. 4, pp. 435-462, Nov. 2008.
[7] John A. Kalomiros, John N. Lygouras, “Comparative Study of Local SAD
and Dynamic Programming for Stereo Processing Using Dedicated Hardware,”
EURASIP Journal on Advances in Signal Processing 2009.
[8] R. Zabih and J. Woodfill, “Non-Parametric Local Transforms for
ComputingVisual Correspondence,” Proc. Third European Conf. Computer Vision, pp. 150-158, 1994.
[9] C. Zinner, M. Humenberger, K. Ambrosch, and W. Kubinger, “An optimized
software-based implementation of a census-based stereo matching algorithm,” in Proceedings of the 4th International Symposium on Advances in Visual
Computing, ser. ISVC ’08. Berlin, pp. 216-227, 2008.
[10] 謝易錚,「以立體視覺實作盲人輔具系統」,國立中央大學資訊工程研究所
碩士論文,民國九十五年七月。
[11] Altera’s manual:Developing Peripheral for SOPC Builder,March 2013,URL:http://www.altera.com/literature/an/an333.pdf
[12] Altera’s manual:Using SOPC Builder &; DSP Builder Tool Flow,March
2013,URL:http://www.altera.com/literature/an/an394.pdf
[13] Altera’s manual:Nios II Embedded Peripherals IP User Guide,March 2013,
URL:http://www.altera.com/literature/ug/ug_embedded_ip.pdf
[14] Altera’s manual:Avalon Bus Specification Reference Manual,March 2013,
URL:http://www.altera.com.cn/literature/manual/mnl_avalon_bus.pdf
[15] Altera’s manual:Nios II Custom Instruction User Guide,March 2013,URL:http://www.altera.com/literature/ug/ug_nios2_custom_instruction.pdf
[16] Altera’s manual:Creating Multiprocessor Nios II Systems tutorial,March
2013,URL:
http://www.altera.com/literature/tt/tt_nios2_multiprocessor_tutorial.pdf
[17] Altera’s manual:SOPC Builder Design Optimizations,March 2013,URL:
http://www.altera.com/literature/hb/nios2/edh_ed51007.pdf
[18] Altera’s manual:Hardware Acceleration and Coprocessing,March 2013,
URL:http://www.altera.com/literature/hb/nios2/edh_ed51006.pdf
[19] Altera’s manual:Memory System Design,March 2013,URL:
http://www.altera.com/literature/hb/nios2/edh_ed51008.pdf
[20] Altera’s manual:Nios II Core Implementation Details,March 2013,URL:
http://www.altera.com/literature/hb/nios2/n2cpu_nii51015.pdf
[21] Altera’s manual:Floating-Point Megafunctions User Guide,March 2013,URL:
http:// www.altera.com/literature/ug/ug_altfp_mfug.pdf‎
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