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研究生:曾鼎鈞
研究生(外文):Ding-Jyun Ceng
論文名稱:具有多重保護能力之低壓降穩壓器(LDO)設計
論文名稱(外文):A Low-Voltage CMOS Low Dropout Regulator with Multiple Protections
指導教授:洪玉城洪玉城引用關係
指導教授(外文):Yu-Cherng Hung
學位類別:碩士
校院名稱:國立勤益科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:中文
論文頁數:53
中文關鍵詞:穩壓器保護電路設計
外文關鍵詞:LDOregulatorthermal shutdown
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基於之前文獻所發表保護電路,本論文採用其電路架構,並整合應用於低壓降穩壓器(Low Drop-Out Regulator :LDO)設計。電路採用臺灣積體電路公司(TSMC) 0.35μm CMOS製程,完成整合一具有「電流限制電路」、「折返式限流電路」與「溫度保護」保護能力之LDO設計。本電路經HSPICE模擬,可正常工作於電源電壓0.9 V到1.1 V之間,輕重負載(5 mA至50 mA)切換時,具有不超過5 μs的快速暫態響應。
電流限制電路限制LDO輸出電流於55 mA;折返式限流電路在輸出端短路到地時將輸出電流限制在40 mA使LDO輸出端功率電晶體上的功率消耗減少以保護功率電晶體;溫度保護具有磁滯曲線,其兩個轉折溫度點分別為90℃和110℃整合於LDO輸出端,使LDO在工作溫度高於110℃時關閉當溫度低於90℃時LDO重新啟動。

Based on previous research, this thesis presents a LDO(Low Drop-Out Regulator: LDO) regulator with multiple capabilities of constant current limiting circuit, fold-back current limiting, and thermal shutdown. The circuit function is simulated by HSPICE. The technology is TSMC 0.35 m CMOS process. By simulation, the supply voltage of the LDO regular is capable of ranging from 0.9 V to 1.1 V. When loading changes from light to heavy, the transient responses time is less than 5 s. When the load current is changed from 0 mA to 50 mA, the output voltage still successfully regular on 0.5 V. When the load current is greater than 55 mA, based on current limiter, the output current is limited to 40 mA.

The proposed LDO operates at the 1-V supply voltage. When the temperature rises above to 110°C, the LDO will shut down. Whereas the junction temperature drops approximately to 90 °C, the LDO will resume again.

摘要 I
Abstract II
目錄 III
表目錄 V
圖目錄 VI
第一章 序論 1
1.1 研究動機 1
第二章 穩壓器種類與文獻回顧 2
2.1 穩壓器種類 2
2.1.1 線性穩壓器 3
2.1.2 切換電感式穩壓器 3
2.1.3 切換電容式穩壓器 5
2.2 穩壓器特性比較 8
2.3 LDO文獻回顧 10
2.3.1. 頻率補償 10
2.3.2. 快速暫態響應 11
2.3.3. 電源拒斥比 12
2.3.4. 無輸出電容 13
第三章 LDO穩壓器特性說明 15
3.1 電路架構與工作原理 15
3.2 LDO規格 16
3.2.1. 靜態電流(Quiescent Current) 16
3.2.2. 效率(Efficiency : η) 17
3.2.3. 負載調節率(Load Regulation) 17
3.2.4. 線性調節率(Line Regulation) 17
3.2.5. 暫態響應(Transient Response) 18
3.2.6. NMOS與PMOS低壓降線性穩壓器差別 18
第四章 保護電路 21
4.1 常見的電路保護 21
4.2 短路保護(Short Circuit Protection) 21
4.2.1. 固定電流限制電路 21
4.2.2. 折返式電流限制電路 24
4.3 過電壓保護(Over Voltage Protection) 25
4.2 溫度保護(Thermal Shutdown) 25
第五章 LDO與保護電路設計 28
5.1 反相器基本原理 28
5.2 DEA架構與工作原理 29
5.3 差動轉單端電路(Differential to Single) 31
5.4 LDO電路架構 32
5.5 保護電路 35
5.5.1. 電流取樣電路 36
5.5.2. 折返式限流電路 37
5.5.3. 溫度保護電路 38
5.6 溫度保護 39
第六章 LDO設計與模擬 42
6.1 LDO設計規格 42
6.2 功率電晶體尺寸設計 43
6.3 溫度保護電路 44
6.4 LDO模擬 45
6.5 暫態響應 46
6.6 電流保護功能 46
6.8 靜態電流 48
6.9 文獻與模擬比較 49
第七章 結論 51
7.1 結論 51
7.2 未來改善方向 51
參考文獻 52

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