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研究生:李仁豪
研究生(外文):Lee, Jen-How
論文名稱:超寬頻帶和V頻帶CMOS接收機前端電路之研究
論文名稱(外文):Study of Ultra-Wideband and V-band CMOS Receiver Front-End
指導教授:林佑昇林佑昇引用關係
指導教授(外文):Lin, Yo-Sheng
口試委員:孫台平呂學士邱顯欽杜順利
口試日期:2013-01-26
學位類別:博士
校院名稱:國立暨南國際大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:英文
論文頁數:192
中文關鍵詞:接收機前端電路
外文關鍵詞:receiver front-end
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本論文以超寬頻帶和V頻帶CMOS接收機前端電路為研究目標。此論文主要分為三大部分。首先,我們以TSMC 90-nm CMOS製程技術實現了3-20-GHz低雜訊放大器、3-20-GHz接收器前端電路。接下來,我們以TSMC 0.18-m CMOS製程技術實現了一個21-29-GHz接收機前端電路。最後,我們以TSMC 90-nm CMOS製程技術實現了50.4-62.9-GHz寬頻低雜訊放大器、60-GHz雙平衡式混頻器以及60-GHz接收機前端電路。
首先,我們提出一個電流再生串接組態的寬頻低雜訊放大器。其利用電阻並並回授,搭配負載並聯LC形成一個二階寬頻帶通濾波器,來實現寬頻輸入匹配。總功率消耗為9.96毫瓦,且於1.9 GHz到22.5 GHz範圍內,輸入反射係數低於–8.77 dB,隔離度低於–29.7 dB,順向增益11.52±2 dB和4.24±0.65 dB的雜訊指數;除此之外,輸出反射係數在2.6 GHz到26.5 GHz範圍內都低於–10 dB。
緊接著是一個由電流再生串接式的低雜訊放大器、單平衡式混波器和將差動輸出轉單端輸出的轉換器所組成的3–20-GHz寬頻融合LNA和Mixer之接收機前端電路。其具有14.01±2.63 dB的轉換增益、RF端的輸入反射係數低於–8.77 dB、LO-IF的隔離度低於–29.9 dB、LO-RF的隔離度低於–43.4 dB、RF-IF的隔離度低於–60.1 dB;並且在4 GHz時,具有最小的雜訊指數3.46 dB。此電路包含測試墊的面積為0.985 mm2,總功率消耗為9.2毫瓦。
接下來我們提出了一個21-29 GHz互補式金氧半導體超寬頻接收機前端電路,包含一個低雜訊放大器、一個波混頻器及二個馬遜巴倫。 此接收機前端電路具有4.6±0.5 dB的雜訊指數、23.7±1.4 dB的轉換增益、RF端輸入損耗低於–8.8 dB、LO-IF的隔離度低於–47 dB、LO-RF的隔離度低於–55 dB和低於–35.5 dB的RF-IF隔離度。此電路包含測試墊的面積為1.251.06 mm2,總功率消耗為39.2毫瓦。
然後是一個具有9.92±1.5 dB 順向增益和最小雜訊指數3.88 dB 的14.1毫瓦之50.4-62.9 GHz三級低雜訊放大器。其輸入損耗在55.1 GHz 到 59.5 GHz之間低於–10 dB和輸出損耗在55.1 GHz 到 59.4 GHz之間低於–10dB。在3-dB頻寬內的隔離度低於–42.6 dB,並且在60 GHz的P1dB和IIP3分別是–23 dBm和–11.2 dBm。此電路包含測試墊的面積為0.58 mm2。
除此之外,我們也提出了一個60-GHz直接降頻式雙平衡式混波器。由一個具有電流再生的RF端單端轉雙端輸出之轉換器、LO端整合馬遜巴倫之雙平衡式吉伯特混波器和基頻放大器組合而成。在60-GHz時,雜訊指數為12.8 dB,總功率消耗為17毫瓦。在RF頻率為60 GHz和LO頻率為59.9 GHz時,其LO-RF隔離度為–64.7 dB、LO-IF隔離度為–51.5 dB和RF-IF隔離度為–59.5 dB。在IF頻率固定為0.1 GHz時,最大的轉換增益15.46 dB發生在RF頻率為62 GHz,而RF頻率為60 GHz的轉換增益為14.7 dB,在最近幾篇60 GHz混波器的文獻中,我們具有最佳的轉換增益。
最後,60-GHz接收機前端電路包含寬頻低雜訊放大器、具有電流再生的RF端單端轉雙端輸出之轉換器和LO端整合馬遜巴倫之雙平衡式吉伯特混波器和基頻放大器組合而成,總消耗之功率為34.36毫瓦,且於RF頻率為60 GHz和LO頻率為59.9 GHz的LO-RF、LO-IF和RF-IF隔離度分別為60.7 dB、45.3 dB和41.9 dB。在IF頻率固定為0.1 GHz時,最大的轉換增益26.1 dB發生在RF頻率為64 GHz,而RF頻率為60 GHz的轉換增益為25.2 dB,相對應RF的3-dB頻寬為7.26 GHz(58.39 GHz 到 65.65 GHz)。而最小雜訊指數8.1 dB在RF頻率為65 GHz。這些結果暗示著我們的60-GHz接收機前端電路在射頻積體電路的應用上是非常有潛力的。

The aim of this thesis is to design the ultra-wideband and V-band front-end circuits of CMOS receivers. This thesis is divided into three parts. First, a 3-20-GHz low-noise amplifier (LNA) and a 3-20-GHz CMOS receiver front-end were implemented by TSMC 90-nm CMOS technology. Second, a 21-29-GHz CMOS receiver front-end was implemented by TSMC 0.18-m CMOS technology. Finally, a 57.9-66.4-GHz wideband LNA, a 60-GHz double-balanced mixer, and a 60-GHz receiver front-end were implemented by TSMC 90-nm CMOS technology.
First of all, a wideband LNA based on the current-reused cascade configuration is proposed. The wideband input-impedance matching was achieved by taking advantage of the resistive shunt–shunt feedback in conjunction with a parallel LC load to make the input network equivalent to two parallel-branches, i.e., a second-order wideband bandpass filter. This LNA dissipates 9.96 mW power and achieves S11 below –8.77 dB, S12 below –29.7 dB, S21 of 11.52±2 dB, and flat NF of 4.24±0.65 dB over the 1.9–22.5-GHz band of interest. Besides, S22 below –10 dB from 2.6 to 26.5 GHz is also achieved.
Second, a 3–20-GHz wideband merged CMOS LNA and Mixer comprises a current-reused cascaded LNA, a single-balanced (SB) mixer and a differential to single converter (DSC) for converting differential IF signal to single signal and wideband output matching. The proposed merged LNA and SB mixer exhibits a conversion gain of 14.01±2.63 dB, RF port reflection coefficient lower than –8.77 dB, LO-IF isolation lower than –29.9 dB, LO-RF isolation lower than –43.4 dB, RF-IF isolation lower than –60.1 dB, and a minimum noise figure (NFmin) of 3.46 dB at 4 GHz. This circuit occupies a chip area of 0.985 mm2, including the test pads. The total dc power dissipation is only 9.2 mW.
Then, we present a 21-29 GHz CMOS UWB receiver front-end. The receiver front-end comprises a low-noise amplifier (LNA), a mixer, and two Marchand baluns. Over the 21-29 GHz band, the receiver front-end exhibits excellent NF of 4.6±0.5 dB, conversion gain of 23.7±1.4 dB, RF port reflection coefficient lower than –8.8 dB, LO-IF isolation lower than –47 dB, LO-RF isolation lower than –55 dB, and RF-IF isolation lower than –35.5 dB. The circuit occupies a chip area of 1.251.06 mm2, including the test pads. The dc power dissipation is only 39.2 mW.
A 50.4-62.9 GHz three-stage LNA exhibits forward gain (S21) of 9.92±1.5 dB and a minimum noise figure (NFmin) of 3.88 dB at 55.5 GHz with power consumption of 14.1 mW. The measured S11 was better than –10 dB from 55.1 GHz to 59.5 GHz and S22 was better than –10 dB from 55.1 GHz to 59.4 GHz. The measured reverse isolation S12 is better than –42.6 dB over the 3-dB bandwidth. It also achieved P1dB-in of –23 dBm, and IIP3 of –11.2 dBm at 60 GHz. The chip size of this LNA is 0.58 mm2 including all the testing pads.
In addition, a 60 GHz double-balanced mixer for direct down-conversion is reported. The down-conversion mixer comprises a double-balanced Gilbert cell with a current-reused RF single-to-differential converter (SDC) for conversion gain (CG) enhancement, a Marchand balun for converting the single LO input signal to differential signal, and a baseband amplifier. The mixer consumes 17 mW and achieves low noise figure (NF) of 12.8 dB at 60 GHz. In addition, the mixer achieves excellent LO-RF isolation of –64.7 dB, LO-IF isolation of –51.5 dB, and RF-IF isolation of –59.5 dB at RF of 60 GHz and LO of 59.9 GHz. At IF of 0.1 GHz, the mixer achieves maximum CG of 15.46 dB at RF of 62 GHz, and CG of 14.7 dB at RF of 60 GHz, the best CG results ever reported for a 60 GHz CMOS down-conversion mixer.
Finally, the 60-GHz receiver front-end comprises a wideband low-noise amplifier (LNA), a double-balance Gilbert cell mixer with current-reused RF single-to-differential converter (SDC), a marchand balun and a baseband amplifier. The receiver front-end consumed 34.36 mW and achieved LO-RF isolation of 60.7 dB, LO-IF isolation of 45.3 dB, and RF-IF isolation of 41.9 dB at RF of 60 GHz and LO of 59.9 GHz. At IF of 100 MHz, the receiver front-end achieved maximum conversion gain of 26.1 dB at RF of 64 GHz and CG of 25.2 dB at RF of 60 GHz. The corresponding 3-dB bandwidth (3dB) of RF is 7.26 GHz (58.39 GHz to 65.65 GHz). The measured minimum noise figure (NF) was 8.1 dB at 65 GHz, an excellent result for a 60-GHz-band CMOS receiver front-end. These results demonstrate the adopted receiver front-end architecture is very promising for high-performance 60-GHz-band RFIC applications.

Table of Contents

Table of Contents………………...............………………………………………I
Table Captions………………………...............………………………………......V
Figure Captions…………………………..............…………...…....…….……..VII


Chapter 1 Introduction
1.1 Motivation……………………………...……...….….........1
1.2 Thesis Organization…………..............................................3

Chapter 2 Design of a 1.9–22.5-GHz Low Power CMOS LNA in TN90RF Technology
2.1 Introduction…………………………...………...................5
2.2 Circuit Design………………………………..............……7
2.2.1 Wideband Input Impedance Matching………………7
2.2.2 S21 Frequency Response……………………………12
2.2.3 NF Frequency Response……………………………13
2.2.4 Proposed Wideband LNA…………………………..15
2.3 Results and Discussions……………………….…………19
2.4 Conclusions…....................................................................24

Chapter 3 A 9.2-mW CMOS Receiver Front-End with Merged LNA and Mixer for UWB and Ku-Band Applications
3.1 Introduction………………………...……….....................26
3.2 Circuit Design....................................................................28
3.2.1 LNA Design…………………...................................29
3.2.2 Mixer and DSC Design………..............................33
3.2.3 Proposed Wideband CMOS Receiver Front-End…..37
3.3 Results and Discussions……………...……...………. 38
3.4 Conclusions........................................................................47

Chapter 4 Design and Analysis of a 21-29 GHz Ultra-Wideband Receiver Front-End in 0.18 m CMOS Technology
4.1 Introduction......................................................................49
4.2 Receiver Architecture…………………...……..................51
4.3 Receiver Front-End Design………………........................53
4.3.1 LNA Design………………………...........................53
4.3.2 Balun……….............................................................64
4.3.3 Mixer Design…………….........................................70
4.4 Results and Discussions………………….……..………. 79
4.5 Conclusions .......................................................................84

Chapter 5 V-band Low Noise Amplifiers in TSMC 90 nm CMOS RF Process
5.1 Introduction........................................................................85
5.2 LNA Design....................................................................88
5.3 Results and Discussions……………….………..………. 97
5.4 Conclusions......................................................................105


Chapter 6 A 14.7 dB Gain, 64.7 dB LO-RF Isolation 60 GHz Down-Conversion Mixer with Integrated Active S/D Converter and On-chip Marchand Balun
6.1 Introduction......................................................................108
6.2 Circuit Design…...…………….......................................109
6.2.1 S/D Converter........................................................110
6.2.2 Marchand Balun....................................................113
6.2.3 IF Amplifier...........................................................119
6.2.4 Proposed Mixer………….....................................119
6.3 Results and Discussions………………….……..………126
6.4 Conclusions......................................................................136

Chapter 7 60-GHz Receiver Front-End with RF Single-to-Differential Converter and Integrated Marchand Balun
7.1 Introduction......................................................................138
7.2 Circuit Design…...…………….......................................140
7.2.1 LNA Design...........................................................141
7.2.2 Mixer Design.........................................................145
7.2.2.1 Current-Reused RF SDC…………..……145
7.2.2.2 Marchand Balun……………...…………146
7.2.2.3Mixer…………………………………….150
7.2.3 Proposed Receiver Front-End...............................156
7.3 Results and Discussions……………….………..………159
7.4 Conclusions......................................................................170

Chapter 8 Conclusions.................................................................................171
References..............................................................................................................173
Appendix................................................................................................................186
Publication List....................................................................................................189
Vita............................................................................................................................192

Table Captions

Table 1.1 Summary of characteristics of UWB (3.1-10.6 GHz) and V-band (57-66 GHz)………………………………………………...…………………………………2
Table 1.2 Summary of characteristics of UWB (22-29 GHz)…………………………2
Table 2.1 Summary of this work and other prior arts………………………………...24
Table 3.1 Summary of this work and other prior arts………………………..……....47
Table 4.1 Summary of the implemented 21-29 GHz CMOS receiver front-end, and recently reported state-of-the-art 21-29 GHz band CMOS receiver front-ends…………………….……………………………...…………….84
Table 5.1 The summary of MSL testkey......................................................................93
Table 5.2 The summary of parameters of LNA’s MSL inductors……………………93
Table 5.3 Summary of this work and other prior arts……………………………….105
Table 6.1 Summary of 60 GHz Mixer’s MSL inductors............................................120
Table 6.2 Summary of 60 GHz Mixer’s transistors………...……………………….121
Table 6.3 Summary of 60 GHz Mixer’s capacitors and resistors……………..…….121
Table 6.4 Summary of this work and other prior arts……………………………….135
Table 7.1 Performance summary of LNA and other prior arts...................................144
Table 7.2 Summary of the implemented 60 GHz CMOS down-conversion mixer, and recently reported state-of-the-art 60-GHz-band CMOS down-conversion mixers…155
Table 7.3 transistor characteristics of the LNA……………………………………..156
Table 7.4 Summary of the adopted MSL inductors and interconnection-line parasitic inductors of the LNA………………………………………………………………..157
Table 7.5 Summary of the adopted resistors and capacitors of the LNA…………...157
Table 7.6 transistor characteristics of the Mixer……………………………………158
Table 7.7 Summary of the adopted MSL inductors and interconnection-line parasitic inductors of the Mixer………………………………………………………………158
Table 7.8 Summary of the adopted resistors and capacitors of the Mixer………….159
Table 7.9 Summary of the implemented 60-GHz-band CMOS receiver front-end, and the recently reported state-of-the-art 60-GHz-band CMOS receiver front-ends…...170
Figure Captions

Fig. 2.1 (a) Schematic and (b) small-signal equivalent circuit of an amplifier with the proposed resistive shunt–shunt feedback in conjunction with a parallel LC load………………………………………………………………………....6
Fig. 2.2 Simulated S11 versus frequency characteristics of the amplifier in Fig. 2.1(a): (a) based on (2), (7), and (8) and (b) based on (2) and under various values of Rf1……......................................................................................................11
Fig. 2.3 Simulated S21 versus frequency characteristics of the amplifiers in Fig. 2.1(a) both with and without a buffer stage.............................................................13
Fig. 2.4 The noise equivalent circuit of Fig. 2.1(a)……………………….................15
Fig. 2.5 (a) Schematic, (b) complete small-signal equivalent circuit, and (c) simplified small-signal equivalent circuit (for analyzing S11) of the proposed UWB LNA...............................................................................................................17
Fig. 2.6 Simulated S11 versus frequency characteristics under various values of: (a) Lg1 and (b) Ld1 of the proposed wideband LNA..........................................18
Fig. 2.7 Chip micrographs of: (a) LNA-1 and (b) LNA-2……………………….......19
Fig. 2.8 S-parameters versus frequency characteristics of the LNAs………………..20
Fig. 2.9 Measured group delay versus frequency characteristics of LNAs………......21
Fig. 2.10 Measured and simulated stability factors versus frequency characteristics of LNAs……………………………………………………………………….21
Fig. 2.11 Measured and simulated NF versus frequency characteristics of LNAs…22
Fig. 2.12 Measured P1dB and IIP3 of LNAs………………………………………...23
Fig. 3.1 Proposed wideband receiver front-end……………………...........................27
Fig. 3.2 The conventional narrowband receiver front-end (a) a cascode LNA and single-balanced mixer and (b) a merged LNA and mixer.............................28
Fig. 3.3 (a) Complete schematic and (b) die photo of the 3–20-GHz CMOS UWB LNA...............................................................................................................29
Fig. 3.4 The measured (a) input-return-loss S11 and output-return-loss S22, (b) forward gain S21, reverse gain S12, and NF, and (c) group delay versus frequency characteristics of the 3–20-GHz CMOS wideband LNA..............................31
Fig. 3.5 The measured stability factors μ versus frequency characteristics and μ' versus frequency characteristics of the 3–20-GHz CMOS wideband LNA..33
Fig. 3.6 The measured P1dB and IIP3 at 12 GHz of the CMOS wideband LNA..........33
Fig. 3.7 Schematic of SB Mixer and DSC...................................................................34
Fig. 3.8 Simulated S11 versus frequency characteristics under various values of Lg3 of the SB mixer..................................................................................................35
Fig. 3.9 Simulated CG versus RF frequency characteristics and LO-port reflection coefficient versus frequency characteristics of the mixer.............................35
Fig. 3.10 Simulated input third-order intercept point (IIP3) of the mixer at 12 GHz..36
Fig. 3.11 Simulated NF versus RF frequency characteristics of the mixer..................36
Fig. 3.12 Schematics of (a) conventional and (b) proposed receiver front-ends……37
Fig. 3.13 Chip micrograph of the implemented (a) conventional and (b) proposed receiver front-ends………………………………………………………….39
Fig. 3.14 Measured RF-port versus frequency characteristics and IF-port versus frequency characteristics of these two receiver front-ends…………40
Fig. 3.15 Measured CG versus LO input power characteristics……………………40
Fig. 3.16 Measured CG versus RF frequency characteristics of (a) conventional and (b) proposed receiver front-ends at various LO input power………………......41
Fig. 3.17 Measured CG versus RF frequency characteristics and IIP3 versus RF frequency characteristics of these two works………………………………43
Fig. 3.18 Measured CG versus RF input power (RFin) characteristics of this work…43
Fig. 3.19 Measured input third-order intercept point (IIP3) of the (a) conventional and (b) proposed receiver front-ends at 9GHz……………………………….....44
Fig. 3.20 Measured power linearity versus RF frequency characteristics of this work…………………………………………………………………...........45
Fig. 3.21 Measured NF versus RF frequency characteristics of this work at IF = 10 MHz………………………………………………………………………...45
Fig. 3.22 Measured RF-IF, LO-IF and LO-RF leakage versus RF frequency characteristics of the (a) conventional and (b) proposed receiver front-ends………………………………………………………..................46
Fig. 4.1 Block diagram of a typical UWB pulse-radar receiver…………...................51
Fig. 4.2 Schematic of the LNA……………….......………………………………….53
Fig. 4.3 (Simulated (a) and Gmax/GAmax versus frequency characteristics, and (b) NFmin and Gmax versus frequency characteristics of the input transistor M1.................................................................................................................55
Fig. 4.4 Simulated S-parameters versus frequency characteristics of the LNA...........57
Fig. 4.5 Input equivalent circuit of the LNA for S11 calculation: (a) complete circuit, and simplified circuit at frequencies around (b) lower corner frequency, and (c) upper corner frequency..................................................................................58
Fig. 4.6 Simulated S11 versus frequency characteristics of the LNA (a) at various Lg2 values, and (b) at various Lg1 values.............................................................59
Fig. 4.7 Simulated stability parameters S and (or '(S)>1) versus frequency characteristics of the LNA.............................................................................60
Fig. 4.8 Equivalent circuit of the LNA for noise calculation………………...………61
Fig. 4.9 (a) Simulated NFmin and NF, and (b) simulated and calculated NF versus frequency characteristics of the LNA………………………………............63
Fig. 4.10 (a) Schematic diagram and (b) lump-element equivalent circuit of the Marchand balun.............................................................................................64
Fig. 4.11 Simulated L and Q-factor of a single spiral coil couple-line inductor of the balun in Fig. 4.10(a)......................................................................................67
Fig. 4.12 (a) Simulated and calculated S11, and simulated S21 and S31, and (b) AI and PD versus frequency characteristics of the Marchand balun.....................68
Fig. 4.13 Simulated (a) S31, (b) AI, and (c) PD versus frequency characteristics of the Marchand balun with various metal widths...............................................69
Fig. 4.14 Schematic of the mixer..................................................................................71
Fig. 4.15 Simulated conversion gain versus RF frequency characteristics of the mixer (a) with and without the resonant inductor L2, and (b) at various LO input power.......................................................................................................73
Fig. 4.16 Simulated NFmixer and NFRFE versus IF frequency characteristics (a) with and without the resonant inductor L2, and (b) by using the designed Marchanrd baluns and by using the ideal baluns………………...............75
Fig. 4.17 Simulated NFRFE versus IF frequency characteristics at various LO frequencies and LO input power…………………………………………76
Fig. 4.18 Simulated CG and NF versus frequency characteristics of the receiver front-end at various (a) Lg1 values, (b) Lg2 values, and (c) L1 values……77
Fig. 4.19 Chip micrograph of the implemented receiver front-end…………………79
Fig. 4.20 Measured and simulated RF-port reflection coefficient, and measured LO-port reflection coefficient versus frequency characteristics of the receiver front-end………………………………………………………...80
Fig. 4.21 (a) Measured and simulated CG versus RF frequency characteristics, (b) measured and simulated CG versus LO input power characteristics, and (c) measured RF-IF, LO-IF and LO-RF isolation versus frequency characteristics of the receiver front-end……………………..……….......80
Fig. 4.22 Measured and simulated NF versus frequency characteristics of the receiver front-end………………………………………………………………….82
Fig. 4.23 Measured input third-order intercept point (IIP3) of the receiver front-end at 24 GHz…………………………………………………………………...83
Fig. 5.1 Unlicensed 60 GHz frequency bands..............................................................86
Fig. 5.2 (a) Schematic and (b) chip micrograph of the three-stage CMOS LNA…....87
Fig. 5.3 Simulated (a) NFmin versus frequency characteristics, and (b) Gmax versus frequency characteristics, and (c) and Gmax/GAmax versus frequency characteristics of the input transistor M1.......................................................89
Fig. 5.4 The chip micrograph of MSL testkey..............................................................90
Fig. 5.5 Measured (a) inductance versus frequency characteristics, and (b) Quality factor and Loss versus frequency characteristics of the MSL with length of 256 m at various widths..............................................................................90
Fig. 5.6 Simulated (a) S11 and S22, (b) S12 and S21, (c) stability factors and', versus frequency characteristics of the LNA................................................94
Fig. 5.7 Simulated group delay versus frequency characteristics of the LNA.............95
Fig. 5.8 Simulated NF versus frequency characteristics of the LNA...........................96
Fig. 5.9 Measured fundamental and 3-order inter-modulation output power versus input power characteristics of the LNA at 60 GHz..........................................96
Fig. 5.10 The measurement block diagram of S-parameters........................................97
Fig. 5.11 Measured (a) S11 and S22, (b) S12 and S21, (c) stability factors and', versus frequency characteristics of the LNA………………………………98
Fig. 5.12 Measured group delay versus frequency characteristics of the LNA….…..99
Fig. 5.13 The calibration setup of noise figure……………………….……………100
Fig. 5.14 The measurement setup of noise figure…………………...……………...101
Fig. 5.15 Measured NF versus frequency characteristics of the LNA…………...…101
Fig. 5.16 The 1-dB compression point (P1dB) setup………………...………………102
Fig. 5.17 The measurement setup of input third-order intercept point (IIP3)………102
Fig. 5.18 The measured result of the third-order intercept point………………..….103
Fig. 5.19 (a) Measured fundamental and 3-order inter-modulation output power versus input power characteristics of the LNA at 60 GHz. (b) Measured P1dB and IIP3 versus frequency characteristics of the LNA………………………...104
Fig. 6.1 Block diagram of the 60 GHz down-conversion mixer…............................109
Fig. 6.2 General active balun circuits…………………………………….…..........110
Fig. 6.3 Proposed novel active balun architecture......................................................112
Fig. 6.4 Simulated output amplitude and phase difference of the proposed active balun…………………………………...………………………………….112
Fig. 6.5 (a) Schematic diagram and (b) lump-element equivalent circuit of the Marchand balun...........................................................................................115
Fig. 6.6 Simulated L and Q-factor of a single spiral coil couple-line inductor of the balun in Fig. 6.5(a)......................................................................................116
Fig. 6.7 Measured (a) input return loss, (b) insertion loss and amplitude imbalance, and (c) output phase and phase difference of the balun..............................117
Fig. 6.8 Schematic of the proposed 60 GHz Mixer…………………………….119
Fig. 6.9 Simulated CG versus (a) LOin and (b) RFin of the proposed 60 GHz mixer…………………………………………………………………….122
Fig. 6.10 Simulated CG versus RF frequency characteristics of the 60 GHz mixer at various (a) LO input power and (b) RF input power…………...………123
Fig. 6.11 Simulated (a) RF-port, LO-port, and IF-port reflection coefficient and (b) noise figure versus frequency characteristics of the proposed 60 GHz mixer………………………………………………………………………124
Fig. 6.12 Simulated CG of the 60 GHz mixer………………………………………125
Fig. 6.13 Simulated IIP3 of the 60 GHz mixer……………………………………..126
Fig. 6.14 Chip micrograph of the proposed 60 GHz mixer…………………………127
Fig. 6.15 Measured input return loss of the proposed 60 GHz mixer…………..…..127
Fig. 6.16 Measured CG versus (a) LOin and (b) RFin of the proposed 60 GHz mixer……………………………………………..………………………..128
Fig. 6.17 Measured CG versus RF frequency characteristics of the 60 GHz mixer at various (a) LO input power and (b) RF input power…………..………….129
Fig. 6.18 Measured CG versus IF frequency characteristics of the proposed mixer..130
Fig. 6.19 Measured differential output (IF) waveform of the proposed mixer……..131
Fig. 6.20 Measured NF versus frequency characteristics of the proposed mixer…..131
Fig. 6.21 Measured (a) output spectrum and (b) CG versus RFin characteristics of the proposed down-conversion mixer……………………………..………….132
Fig. 6.22 Measured (a) output spectrum of IIP3 at RFin of 35 dBm and (b) fundamental and IM3 output power versus RFin characteristics of the down-conversion mixer………………………………….…..…….…..….133
Fig. 6.23 Measured power linearity versus frequency characteristics of the proposed mixer………………………………………………………………………134
Fig. 6.24 Measured LO-IF, LO-RF, and RF-IF leakage of the proposed mixer….…135
Fig. 7.1 Block diagram of the proposed 60 GHz receiver front-end........................140
Fig. 7.2 (a) Schematic and (b) micrograph of the 60-GHz LNA..............................142
Fig. 7.3 Measured S-parameters of the 60-Hz LNA..................................................142
Fig. 7.4 Measured NF of the 60-Hz LNA.................................................................143
Fig. 7.5 (a) Schematic diagram and (b) small-signal equivalent circuit of the (AC) cascaded transistor M3 of the proposed current-reused RF single-to-differential converter....................................................................145
Fig. 7.6 (a) Schematic diagram and (b) lump-element equivalent circuit of the designed 60 GHz Marchand balun..............................................................147
Fig. 7.7 Chip micrograph of the 60 GHz Marchand balun.........................................148
Fig. 7.8 Measured (a) input reflection coefficients S11, S22 and S33, (b) gains S21 and S31, and amplitude imbalance (AI), and (c) individual phase and phase difference (PD) of S21 and S31 of the Marchand balun................................149
Fig. 7.9(a) Schematic and (b) chip micrograph of the 60 GHz CMOS down conversion mixer.........................................................................................151
Fig. 7.10 Simulated CG at various RF SDC conditions versus RF frequency characteristics of the mixer……………………….……………………….152
Fig. 7.11 Measured (a) CG versus RFin characteristics, and (b) CG versus RF frequency characteristics, and (c) CG versus IF frequency characteristics of the down conversion mixer……………………………………………….152
Fig. 7.12 Measured LO-IF, LO-RF and RF-IF isolations versus frequency characteristics………………………………….………………………….154
Fig. 7.13 Measured power linearity versus frequency characteristics of the proposed mixer………………………………………………..……………………..155
Fig. 7.14 Complete schematic of the proposed 60-GHz CMOS receiver front-end..156
Fig. 7.15 Chip micrograph of the 60-GHz CMOS receiver front-end……………...160
Fig. 7.16 Measured RF-port  of the 60 GHz receiver front-end…………………..161
Fig. 7.17 Measured CG versus (a) LOin and (b) RFin of the 60 GHz receiver front-end…………………………………………………………………161
Fig. 7.18 Measured CG versus RF frequency characteristics of the 60 GHz receiver front-end at various (a) LO input power and (b) RF input power…...……162
Fig. 7.19 Measured CG versus IF frequency characteristics of the 60 GHz receiver front-end at various LO input power…………………….………………..163
Fig. 7.20 Measured differential output (IF) waveform of the 60 GHz receiver front-end…………………………………………………………………..164
Fig. 7.21 Measured output phase difference of the 60 GHz receiver front-end…..165
Fig. 7.22 Measured NF versus frequency characteristics of the 60 GHz receiver front-end…………………………………………………………………..165
Fig. 7.23 Measured (a) output spectrum and (b) CG versus RFin characteristics of the 60 GHz receiver front-end………………..……………………………….166
Fig. 7.24 Measured P1dB versus frequency characteristics of the the 60 GHz receiver front-end…………………………………………………………………167
Fig. 7.25 Measured (a) output spectrum of IIP3 at RFin of 35 dBm and (b) fundamental and IM3 output power versus RFin characteristics of the 60 GHz receiver front-end……………………………………………………167
Fig. 7.26 Measured IIP3 versus frequency characteristics of the 60 GHz receiver front-end…………………………………….…………………………….169
Fig. 7.27 Measured LO-IF, LO-RF, and RF-IF leakage of the 60 GHz receiver front-end…………………………………………………………………..169

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