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研究生:何秉儒
研究生(外文):Ho, Ping-Ju
論文名稱:以凱文結構研究厚銅金屬墊層覆晶銲錫接點在電遷移測試下不同階段的破壞模式
論文名稱(外文):Study of electromigration failure mode in flip-chip solder joints with copper columns using Kelvin bump
指導教授:陳智陳智引用關係李信義李信義引用關係
指導教授(外文):Chen,Chih
學位類別:碩士
校院名稱:國立交通大學
系所名稱:加速器光源科技與應用碩士學位學程
學門:自然科學學門
學類:其他自然科學學類
論文種類:學術論文
論文出版年:2012
畢業學年度:101
語文別:中文
論文頁數:51
中文關鍵詞:電遷移覆晶焊錫厚銅金屬墊層
外文關鍵詞:ElectromigrationFlip-chipCopper column
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隨著電子產品逐漸傾向輕、薄、短、小等趨勢,及具有更大效能的方向發展,3DIC電子構裝技術勢必成為未來的主流。而隨著尺寸變小,低焊錫高度的焊錫接點則是3DIC的一個重要關鍵。由於電遷移在低焊錫高度的行為尚未十分清楚,因此我們使用Sn2.3Ag,焊錫高度為15 μm的焊錫接點進行電遷移測試,觀察其破壞模式。為了精確的量測阻值的變化,我們使用了凱文結構,觀察不同阻值上升階段的破壞模式,其中包含阻值上升3%、5%、10%和20%不同階段,並使用電子顯微鏡來觀察微結構的變化,研究不同階段的破壞模式。其結果顯示,孔洞生成在介金屬化合物與金屬墊層之間,這與高bump height的破壞模式大不相同,因此本研究提供一個研究覆晶銲錫接點電遷移測試破壞機制的系統性方法。另外,因晶片內部不同材料的熱膨脹係數會導致應力產生甚至彎曲。我們使用了國家同步輻射中心的八環X光繞射儀研究矽晶片在電遷移測試後所造成的應變變化,分析破壞模式與內部應變的變化是否具有一定的關連。
As electronic products become smaller but have higher performance, three-dimensional integrate circuit(3DIC)has received more attention recently. Low bump height microbump is the key interconnection technology to build up the 3DIC. However, the electromigration(EM)behavior in the low bump height solder is still unclear. In this study, the Sn2.3Ag solder joint which bump height is 15 μm were used to observe the failure mode in the low bump height case. To precisely monitor the different stages of failure during accelerated EM testing, a specific Kelvin bump structure is designed and fabricated in these samples. While a 1.17 x 104 A/cm2 current density was applied at 150℃,the microstructures at different stages with the 3%、5%、10% and 20% resistance increase were obtained by scanning electron microscopy(SEM). The resistance obtained by Kelvin bump structure showed three different stages, which differs from the results of traditional flip-chip solder joints. Voids formed in the interface of under-bump-metallization(UBM)and intermetallic compounds. With the proper designed Kelvin bump structure and well controlled test conditions, the different stages during EM test can be studied systematically. In this study, we also use x-ray diffraction in National Synchrotron Radiation Research Center`(NSRRC)to study the strain change of silicon die after different current stressing time, to find out the relationship between strain and failure mode.
摘 要 i
ABSTRACT ii
誌謝 iii
目錄 vii
圖目錄 ix
第一章、緒論 1
第二章、文獻回顧 6
2-1.電遷移理論 6
2-2 銲錫凸塊的電遷移行為 7
2-3電流集中效應(Current crowding effect) 7
2-4焦耳熱效應(Joule heating effect) 8
2-5電遷移造成銲錫接點孔洞的生成 9
2-6減緩電流集中效應的方法 10
2-6-1 UBM 厚度的改變 10
2-6-2 UBM 種類的變換 11
2-7 同步輻射簡介 11
2-8矽晶片的應變變化 12
第三章、實驗方法、步驟與結果 20
3-1試片製備 20
3-2實驗方法 21
3-2-1. 以凱文結構各別量測銲錫凸塊 21
3-2-2 電遷移的加速測試 22
3-2-3試片破壞模式的觀察 23
3-3利用同步輻射光源量測矽晶片的應變變化 24
第四章 結果與討論 28
4-1 以銅導線的 TCR effect 校正銲錫球的溫度 28
4-2焊錫接點(電子流向下)電阻曲線圖分析 29
4-3 破壞模式分析 30
4-3-1電子流向下的破壞模式 30
4-3-2電子流向上的破壞模式 33
4-4電遷移測試後的矽晶片應力分析 35
4-4-1矽晶片的優選方向 35
4-4-2矽晶片的應變分析與測量 35
五、結論 47
參考文獻 50
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[2] R.J. Wassink, Soldering in Electronics, Electrochemical Pub. Ltd., pp. 99, 1984.
[3] V. B. Fiks, Soviet Physics – Solid State, 1, pp. 14-28, 1959.
[4] P. S. Ho and T. Kwok, Electromigration in metals, RPP. 52, pp.301-348, 1989
[5] H. B. Huntington and A. R. Grone, J. Phys. Chem. Solid 20, 76, 1961.
[6] V. B. Fiks, Sov. Phys., Solid state, 1, 14 , 1959.
[7 ] K. N. Chiang, C. C. Lee, C. C. Lee, and K. M. Chen, “ Current crowding-induced electromigration in SnAg3.0Cu0.5 microbumps”, APL.Vol 8, 072102, 2006.
[8] T. L. Shao, S. W. Liang, T. C. Lin, and Chih Chen, JAP. 98, pp. 044509, 2005
[9] E. C. C. Yeh, W. J. Choi, and K. N. Tu, P. Elenius, and H. Balkan, APL. Vol.80, Issue4, pp. 580-582, 2002.
[10] Joule, J.P. Philosophical Magazine, Vol. 19, PP. 260; Scientific Papers 65,1841.
[11] T. L. Shao, S. H. Chiu, C. Chen, D. J. Yao, and C.Y. Hsu, “Thermal gradient in solder joints under electrical-current stressing” Journal of Electronic Materials, 33, pp. 1350-1354, 2004.
[12] L. Zhang, S. Ou, J. Huang, K. N. Tu, S. Gee and L. Nguyen, “Effect of current crowding on void propagation at the interface between intermetallic compound and solder in flip chip solder joints”, APL. Vol.88, Issue, 012106, 2006.
[13] S. H. Chiu, T. L. Shao, and C. Chen, “Infrared microscopy of hot spots induced by Joule heating in Flip-chip SnAg solder joints under accelerated electromigration”, APL Vol.88, 022110, 2006.
[14] T. Y. Lee, and K. N. Tu, “Electromigration of eutectic SnPb and SnAg3.8Cu0.7 flip chip solder bumps and under-bump metallization”, JAP, Vol. 90, N. 9, 2001.
[15.] W. J. Choi, E. C. C. Yeh, and K. N. Tu, “Mean-time-to failure study of flip chip solder joints on Cu/Ni(V)/Al thin-film under-bump-metallization”, JAP, Vol. 94, N. 9, 2003.
[16] Y. W. Chang, C. Chen “Study of void formation due to electromigration in flip-chip solder joints using Kelvin bump probes”, APL, Vol. 89, Issue 3, 032103,2006.
[17] J. W. Nah, J. O. Suh, and K. N. Tu, S. W. Yoon, V. S. Rao, and V. Kripesh and F. Hua “ Electromigration in flip chip solder joints having a thick Cu column bump and a shallow solder interconnect“, JAP. Vol.100, Issue 12, 123513 , 2006.
[18] J. W. Nah, K. Chen, J. O. Suh, and K. N. Tu, “Electromigration Study in Flip Chip Solder Joints”, ECTC pp.1450-1455, 2007.
[19] T. L. Shao, S. W. Liang, T. C. Lin, and C. Chen, “Three-dimensional simulation on current-density distribution in flip-chip solder joints under electric current stressing ” JAP. Vol.98, Issue 4, 044509, 2005.
[20 ] National Synchrotron Radiation Research Center” Synchrotron Light Source”.
[21] S.A. Gee, W.F. V. D. Bogert, and V.R. Akylas, “Strain-gauge mapping of die surface stresses”, IEEE Trans. Compon. Packag. Technol. 12, 587, 1989.
[22] P. S. Ho, G. Wang, M. Ding, J. H. Zhao, and X. Dai, “Reliability issues for flip-chip packages”, Microelectron.Reliab. 44, 719, 2004.
[23] A. T. WU, C.Y. TSAI, “In Situ Measurements of Thermal and Electrical Effects of Strain in Flip-Chip Silicon Dies Using Synchrotron Radiation X-rays”, JEM, Vol.38, No.11, 2009


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