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[1] M. V. Fischetti , S. Jin , T.-W. Tang , P. Asbeck , Y. Taur , S. E. Laux , M. Rodwell and N. Sano, “Scaling MOSFETs to 10 nm: Coulomb effects, source starvation, and virtual source model,” J. Comput. Electron., vol. 8, p.60 , 2009. [2] M. V. Fischetti and S.E. Laux, “Long-range Coulomb interactions in small Si devices. Part Ⅰ: Performance and reliability,” J. Appl. Phys., vol. 89, no. 2, pp. 1232-1248, January 2001. [3] K. Rim, S. Naeasimha, M. Longstreet, A. Mocuta, and J. Cai, “Low field Mobility characteristics of sub-100 nm unstrained and strained si MOSFETs,” in IEDM Tech. Dig. , pp. 43-46, 2002. [4] Antoine Cros, Krunoslav Romanjek, Dominique Fleury, Samuel Harrison, Robin Cerutti, Philippe Coronel, Benjamin Dumont, Arnaud Pouydebasque, Romain Wacquez, Blandine Duriez, Romain Gwoziecki, Frederic Boeuf, Hugues Brut, Gerard Ghibaudo and Thomas Skotnicki, “Unexpected mobility degradation for very short devices: A new challenge for CMOS scaling,” in IEDM Tech. Dig., pp. 663-666, 2006. [5] Vincent Barral, Thierry Poiroux, Daniela Munteanu, Jean-Luc Autran, and Simon Deleonibus, ‘Experimental investigation on the quasi-ballistic transport: part II—backscattering coefficient extraction and link with the mobility,” IEEE Trans. Electron Devices, vol. 56, no. 3, pp. 420-430, March. 2009. [6] P.Packan, S.Cea, H.Deshpande, T.Ghani, M.Giles, O.Golonzka, M.Hattendorf, R.Kotlyar, K.Kuhn, A.Murthy, P.Ranade, L.Shifren, C.Weber and K.Zawadzki, “High performance Hi-K + metal gate strain enhanced transistors on (110) Silicon,” in IEDM Tech. Dig., pp. 63-66, 2008. [7] M. V. Fischetti, “Long-range Coulomb interactions in small Si devices Part II. Effective electron mobility in thin-oxide structures,” J. Appl.Phys., vol. 89, no. 2, pp. 1232–1250, Jan. 2001. [8] Ming-Jer Chen, Li-Ming Chang, Shin-Jiun Kuang, Chih-Wei Lee, Shang-Hsun Hsieh, Chi-An Wang, Sou-Chi Chang, and Chien-Chih Lee, “Temperature-oriented mobility measurement and simulation to assess surface roughness in ultrathin-gate-oxide ( ~1 nm) nMOSFETs and Its TEM evidence,” IEEE Trans. Electron Devices, vol. 59, no. 4, pp. 949-955, April. 2012. [9] Schred, http://nanohub.org/resources/schred. [10] M. J. Chen, C. C. Lee, and K. H. Cheng, “Hole effective masses as a booster of self-consistent six-band k‧p simulation in inversion layers of pMOSFETs,” IEEE Trans. Electron Devices, vol. 58, pp. 931-937, April 2011. [11] S. Takagi and M. Takayanagi, “Experimental evidence of inversion-layer mobility lowering in ultrathin gate oxide metal-oxide-semiconductor field-effect-transistors with direct tunneling current,” Jpn. J. Appl. Phys., vol. 41, pt. 1, no. 4B, pp. 2348-2352, Apr. 2002. [12] TCAD. http://www.synopsys.com/Tools/TCAD/Pages/default.aspx. [13] D.W. Lin, M. L. Cheng, S.W.Wang, C. C.Wu, and M. J. Chen, “A novel method of MOSFET series resistance extraction featuring constant mobility criteria and mobility universality,” IEEE Trans. Electron Devices, vol. 57, no. 4, pp. 890–897, Apr. 2010. [14] K. Romanjek, F. Andrieu, T. Ernst, and G. Ghibaudo, "Improved split C-V method for effective mobility extraction in sub-0.1-μm Si MOSFETs," IEEE Electron Devices Letters, vol. 25, no. 8, pp. 583-585, Aug. 2004.
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