|
[1] L.S.Y. Wong, S. Hossain, A. Ta, J. Edvinsson, D.H. Rivas, and H. Naas, "A very low-power CMOS mixed-signal IC for implantable pacemaker applications," IEEE Journal of Solid-State Circuits, vol.39, no.12, pp. 2446- 2456, Dec. 2004. [2] Kilhwan Kim, Unsun Cho, Yunho Jung, and Jaeseok Kim, "Design and implementation of biomedical SoC for implantable cardioverter defibrillators," in Proc. IEEE Asian Solid-State Circuits Conference, pp.248-251, 12-14 Nov. 2007. [3] Santosh Chede and Kishore Kulat, “Design Overview of Processor Based Implantable Pacemaker,” Journal of Computers, vol. 3, no. 8, pp. 49-57, August 2008. [4] Sunyoung Kim, Namjun Cho, Seong-Jun Song, Donghyun Kim, Kwanho Kim and Hoi-Jun Yoo, “A 0.9-V 96-μW Digital Hearing Aid Chip with Heterogeneous S-D DAC," Symposium on VLSI Circuits Digest of Technical Papers, pp.55-56, 2006. [5] Harry Neuteboom, Ben M. J. Kup, and Mark Janssens, "A DSP-based hearing instrument IC," IEEE Journal of Solid-State Circuits, vol.32, no.11, pp.1790-1806, Nov. 1997. [6] Sunyoung Kim, Seung Jin Lee, Namjun Cho, Seong-Jun Song, and Hoi-Jun Yoo, "A Fully Integrated Digital Hearing Aid Chip With Human Factors Considerations," IEEE Journal of Solid-State Circuits, vol.43, no.1, pp.266-274, Jan. 2008. [7] Rahul Sarpeshkar, Christopher Salthouse, Ji-Jon Sit, Michael W. Baker, Serhii M. Zhak, Timothy K.-T. Lu, Lorenzo Turicchia, and Stephanie Balster, "An ultra-low-power programmable analog bionic ear processor," IEEE Transactions on Biomedical Engineering, vol.52, no.4, pp.711-727, April 2005. [8] Julius Georgiou, and Christopher Toumazou, "A 126-μW cochlear chip for a totally implantable system," IEEE Journal of Solid-State Circuits, vol.40, no.2, pp. 430- 443, Feb. 2005. [9] C. Haberler, F. Alesch, P. Mazal, P. Pilz, K. Jellinger, M. Pinter, J. Hainfellner, and H. Budka, “No tissue damage by chronic deep brain stimulation in Parkinson's disease”, Ann Neurol, vol. 48, pp. 372-376, 2000. [10] M. Kitagawa, J. Murata, S. Kikuchi, Y. Sawamura, H. Saito, H. Sasaki, and K. Tashiro, “Deep brain stimulation of subthalamic area for severe proximal tremor”, Neurology, vol. 55, pp. 114-116, 2000. [11] Jongwoo Lee, Hyo-Gyuem Rhew, D. Kipke, M. Flynn, "A 64 Channelprogrammable closed-loop deep brain stimulator with 8 channel neural amplifier and logarithmic ADC," IEEE Symposium on VLSI Circuits,pp.76-77, 18-20 June 2008. [12] S. Santaniello, G. Fiengo, L. Glielmo, M. Grill Warren, "Closed-Loop Control of Deep Brain Stimulation: A Simulation Study," IEEE Transactions on Neural Systems and Rehabilitation Engineering, vol.19, no.1, pp.15-24, Feb. 2011. [13] Xiao-jiang Feng, Brian Greenwald, Herschel Rabitz, Eric Shea-Brown, and Robert Kosut, “Toward closed-loop optimization of deep brain stimulation for Parkinson’s disease: concepts and lessons from a computational model, “ J. Neural Eng.,vol. 4, pp.L14–L21, 2007. [14] Privitera MD, Welty TTE, Ficker DDM, and Welge J, “Vagus nerve stimulation for partial seizures (Review),” JohnWiley & Sons, Ltd. 2010. [15] Physician’s Manual: NeuroCybernetic Prosthesis System, Cyberonics, Inc., Dallas Texas, 2012. [16] Felice T. Sun, Martha J. Morrell, and Robert E. Wharen, Jr, “Responsive Cortical Stimulation for the Treatment of Epilepsy,” Neurotherapeutics, vol. 5, pp. 68-74, January 2008. [17] Lisa P. Weinberg, “Implantable neural stimulation device providing activity, reset, and long term closed-loop peripheral vascular disease therapy and method,” U.S. Patent 7,123,967, Oct. 17, 2006. [18] R. R. Harrison, P. T. Watkins, R. J. Kier, R. O. Lovejoy, D. J. Black, B. Greger, F. Solzbacher, "A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural Recording System," IEEE Journal of Solid-State Circuits, vol.42, no.1, pp.123-133, Jan. 2007. [19] Sodagar, A.M.; Wise, K.D.; Najafi, K.; , "A Fully Integrated Mixed-Signal Neural Processor for Implantable Multichannel Cortical Recording," IEEE Transactions on Biomedical Engineering, , vol.54, no.6, pp.1075-1088, June 2007. [20] James D. Weiland, and Mark S. Humayun, "Visual Prosthesis," Proceedings of the IEEE, vol.96, no.7, pp.1076-1084, July 2008. [21] Wentai Liu, M.S. Hurnayun, "Retinal prosthesis," IEEE Int. Solid-State Circuits Conf. Digest of Technical Paper, vol.1, pp. 218- 219, 15-19 Feb. 2004. [22] S. Kim, P. Tathireddy, R. Normann, and F. Solzbacher, “Thermal impact of an active 3-d microelectrode array implanted in the brain,” IEEE Trans. Neural. Syst. Rehabil. Eng., vol. 15, no. 4, pp. 493-501, December 2007. [23] J.C. LaManna, K.A. McCracken, M. Patil, and O.J. Prohaska, “Stimulus-activated changes in brain tissue temperature in the anesthetized rat,” Metab. Brain Dis., vol. 4, pp. 225-237, 1989. [24] TMS320C5515 Fixed-Point Digital Signal Processor, Texas Instruments, Inc., Dallas Texas, 2012. [25] TMS320VC5506 Fixed-Point Digital Signal Processor Data Manual, Texas Instruments, Inc., Dallas Texas, 2008. [26] ADSP-BF592 Blackfin Embedded Processor, Analog Devices, Inc., Norwood, MA, 2011. [27] T.-J. Chen, C. Jeng, S.-T. Chang, H. Chiueh, S.-F. Liang, Y.-C. Hsu, and T.-C. Chien, "A Hardware Implementation of Real-Time Epileptic Seizure Detector on FPGA," in Proc. IEEE Biomedical Circuits and Systems Conference, San Diego, USA, Nov. 10-12, 2011. [28] Cyclone IV FPGAs: Optimized for Lowest Power, Altera, Corporation. [Online]. Available: http://www.trianglebiosystems.com/Files/W32Brief.pdf. [29] Xilinx Power Estimator (XPE), Xilinx, Inc.. [Online]. Available: http://www.xilinx.com/products/design_tools/logic_design/xpe.htm. [30] Lattice Power Estimator, Lattice Semiconductor Corporation. [Online]. Available: http://www.latticesemi.com/dynamic/view_document.cfm?document_id=46811. [31] OMAP-L137, Texas Instruments, Inc., Dallas Texas. [Online]. Available: http://www.ti.com/product/omap-l137. [32] Stellaris LM3S3651 Microcontroller Data Sheet, Texas Instruments, Inc., Dallas, Texas, Nov. 2011. [33] ADuCM360/ADuCM361, Analog Devices, Inc., Norwood, MA, 2011. [34] CC2430 Data Sheet (rev. 2.1), Texas Instruments, Inc., Dallas Texas. [35] SiM3C1xx, Silicon Laboratories, Inc., Austin, TX, 2012. [36] MSP430FG47x MIXED SIGNAL MICROCONTROLLER, Texas Instruments, Inc., Dallas, Texas, March 2011. [37] Medical Applications Guide, Texas Instruments, Inc., Dallas, Texas, 2010. [38] Joyce Kwong, and Anantha P. Chandrakasan, "An energy-efficient biomedical signal processing platform," IEEE Journal of Solid-State Circuits, vol. 46, no. 7, pp.1742-1753, July 2010. [39] Fred J. Taylor, Digital Filters: Principles and Applications with MATLAB, 1st ed., Wiley-IEEE Press, 2012, pp. 127-150. [40] W. H. Theodore and R. S. Fisher, “Brain stimulation for epilepsy,” The Lancet Neurology, vol. 3, pp. 111-118, 2004. [41] W. C. Stacey and B. Litt, “Technology insight: neuroengineering and epilepsy - designing devices for seizure control,” Nature Clinical Practice Neurology, vol. 4, pp. 190-201, 2008. [42] Miguel A. L. Nicolelis, “Actions from thoughts,” Nature, vol. 409, pp.403-407, 2001. [43] B. Feddersen, L. Vercueil, S. Noachtar, O. David, A. Depaulis and C. Deransart, “Controlling seizures is not controlling epilepsy: A parametric study of deep brain stimulation for epilepsy,“ Neurobiology of Disease, vol. 27, pp. 292-300, 2007. [44] Naveen Verma, Ali Shoeb, Jose Bohorquez, Joel Dawson, John Guttag, and Anantha P. Chandrakasan, "A Micro-Power EEG Acquisition SoC With Integrated Feature Extraction Processor for a Chronic Seizure Detection System," IEEE Journal of Solid-State Circuits, vol.45, no.4, pp.804-816, April 2010. [45] Mushfiq U. Saleheen, Homa Alemzadeh, Ajay M. Cheriyan, Zbigniew Kalbarczyk, and Ravishankar K. Iyer, "An efficient embedded hardware for high accuracy detection of epileptic seizures," in 2010 3rd International Conference on Biomedical Engineering and Informatics, vol.5, pp.1889-1896, Oct. 2010. [46] Muhammad Tariqus Salam, Mohamad Sawan, and Dang Khoa Nguyen, “A Novel Low-Power-Implantable Epileptic Seizure-Onset Detector,” IEEE Transactions on Biomedical Circuits and Systems, vol.5, no. 6, pp.568-578, 2011. [47] Shriram Raghunathan, Sumeet K Gupta, Matthew PWard, Robert MWorth, Kaushik Roy and Pedro P Irazoqui, “The design and hardware implementation of a low-power real-time seizure detection algorithm,” Journal of Neural Engineering, pp.1-13, 2009. [48] Himanshu Markandeya, Georgios Karakonstantis, Shriram Raghunathan, Pedro Irazoqui and Kaushik Roy, “Low-Power DWT-Based Quasi-Averaging Algorithm and Architecture for Epileptic Seizure Detection,” 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design, pp.301-306, 18-20 Aug. 2010. [49] J. Aziz, R. Karakiewicz, R. Genov, A. W. L. Chiu, B. L. Bardakjian, M. Derchansky, and P. L. Carlen, “In Vitro Epileptic Seizure Prediction Microsystem,” 2007 IEEE International Symposium on Circuits and Systems, pp. 3115-3118, 2007. [50] J.N.Y. Aziz, R. Karakiewicz, R. Genov, B.L. Bardakjian, M. Derchansky, P.L. Carlen, "Real-time seizure monitoring and spectral analysis microsystem," in Proc. IEEE International Symposium on Circuits and Systems, pp.2133-2136, 21-24 May 2006. [51] Shao-Hang Hung, Chih-Feng Chao, Shu-Kai Wang, Bor-Shyh Lin, Chin-Teng Lin, "VLSI implementation for Epileptic Seizure Prediction System based on wavelet and chaos theory," in 2010 IEEE Region 10 Conference , pp.364-368, 21-24 Nov. 2010. [52] K. Abdelhalim, V. Smolyakov, R. Genov, "Phase-Synchronization Early Epileptic Seizure Detector VLSI Architecture," IEEE Transactions on Biomedical Circuits and Systems, vol.5, no.5, pp.430-438, Oct. 2011. [53] M. Kemal Kiymik, Inan Güler, Alper Dizibüyük, and Mehmet Akin, “Comparison of STFT and wavelet transform methods in determining epileptic seizure activity in EEG signals for real-time application”, Computers in Biology and Medicine, vol. 35, issue 7, pp. 603-616, 2005. [54] Jerald Yoo, Long Yan, Dina El-Damak, Muhammad Bin Altaf, Ali Shoeb, Hoi-Jun Yoo, Anantha Chandrakasan, "An 8-channel scalable EEG acquisition SoC with fully integrated patient-specific seizure classification and recording processor," IEEE International Solid-State Circuits Conference - Digest of Technical Papers, pp.292-294, 19-23 Feb. 2012. [55] Y. Chen, T. Chen, T. Lee, and L. Chen, “Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulator,”in Proc. Int. Symp. Circuits and Systems, pp. 2083-2086, 2010. [56] Homa Alemzadeh, Mushfiq U. Saleheen, Zhanpeng Jin, Zbigniew Kalbarczyk, Ravishankar K. Iyer, "RMED: A reconfigurable architecture for embedded medical monitoring," in 2011 IEEE/NIH Life Science Systems and Applications Workshop (LiSSA), pp.112-115, 7-8 April 2011. [57] Tung-Chien Chen, Kuanfu Chen, Zhi Yang, Cockerham, K., Wentai Liu, "A biomedical multiprocessor SoC for closed-loop neuroprosthetic applications," IEEE International Solid-State Circuits Conference - Digest of Technical Papers, pp.434-435,435a, Feb. 2009. [58] Srinivasa R. Sridhara, Michael DiRenzo, Srinivas Lingam, Seok-Jun Lee, Raúl Blázquez, Jay Maxey, Samer Ghanem, Yu-Hung Lee, Rami Abdallah, Prashant Singh, and Manish Goel," Microwatt Embedded Processor Platform for Medical System-on-Chip Applications," IEEE Journal of Solid-State Circuits, vol.46, no.4, pp.721-730, April 2011. [59] Spanedda F, Cendes F, Gotman J., “Relations between EEG seizure morphology, interhemispheric spread, and mesial temporal atrophy in bitemporal epilepsy,” Epilepsia, vol. 38, pp. 1300-1314, 1997. [60] Andrew M. White, Philip A. Williams, Damien J. Ferraro, Suzanne Clark, Shilpa D. Kadam, F. Edward Dudek, Kevin J. Staley, “Efficient unsupervised algorithms for the detection of seizures in continuous EEG recordings from rats after brain injury,” Journal of Neuroscience Methods, vol. 152, issues 1-2, pp. 255-266, 15 April 2006. [61] Kunjan Patel, Chern-Pin Chua, Stephen Fault and C. J. Bleakley, "Low power real-time seizure detection for ambulatory EEG," in 3rd International Conference on Pervasive Computing Technologies for Healthcare, pp.1-7, 1-3 April 2009. [62] Sheng-Fu Liang, Wan-Lin Chang, and Herming Chiueh, "EEG-based absence seizure detection methods," in 2010 International Joint Conference on Neural Networks (IJCNN), , pp.1-4, 18-23 July 2010. [63] Sheng-Fu Liang, Hsu-Chuan Wang, and Wan-Lin Chang, “Combination of EEG Complexity and Spectral Analysis for Epilepsy Diagnosis and Seizure Detection,” EURASIP Journal on Advances in Signal Processing, vol. 2010. [64] Chung-Ping Young, Sheng-Fu Liang, Da-Wei Chang, Yi-Cheng Liao, Fu-Zen Shaw, and Chao-Hsien Hsieh, “A Portable Wireless Online Closed-Loop Seizure Controller in Freely Moving Rats,” IEEE Trans. on Instrumentation and Measurement, vol. 60, no.2, pp. 513-521, 2011. [65] David A. Patterson, and David R. Ditzel. “The case for the reduced instruction set computer,” SIGARCH Comput. Archit. News, vol. 8, no. 6, pp. 25-33, October 1980. [66] N. Kannathal, M. L. Choo, R. U. Acharya, and P. K. Sadasivan, “Entropies for detection of epilepsy in EEG,” Comput. Method Programs Biomed., vol. 80, no. 3, pp. 187-194, Dec. 2005. [67] O. A. Rosso, “Entropy changes in brain function,” Int. J. Psychophysiol., vol. 64, no. 1, pp. 75–80, Apr. 2007. [68] V. Srinivasan, C. Eswaran, and N. Sriraam, “Approximate entropy-based epileptic EEG detection using artificial neural networks,” IEEE Trans. Inf. Technol. Biomed., vol. 11, no. 3, pp. 288-295, May 2007. [69] S. Ghosh-Dastidat, H. Adeli, and N. Dadmehr, “Mixed-band wavelet-chaos-neural network methodology for epilepsy and epileptic seizure detection,” IEEE Trans. Biomed. Eng., vol. 54, no. 9, pp. 1545-1551, Sep. 2007. [70] S. M. Pincus, “Approximate entropy as a measure of system complexity,” in Proc. Nat. Acad. Sci., vol. 88, no. 6, pp. 2297-2301, Mar. 1991. [71] F. Z. Shaw, “Is spontaneous high-voltage rhythmic spike discharge in Long Evans rats an absence-like seizure activity?” Journal of Neurophysiology, vol. 91, pp. 63-77, 2004. [72] F. Z. Shaw, “7-12 Hz high-voltage rhythmic spike discharges in rats evaluated by antiepileptic drugs and flicker stimulation,” Journal of Neurophysiology, vol. 97, pp. 238-247, 2007. [73] F.-Z. Shaw and Y.-F. Liao, “Incertal control of high-voltage cortical oscillation and whisker tremor in rats with spontaneous absence epileptic discharges,” in Proc. Forum Eur. Neurosci. Soc., Geneva, Switzerland, 2008. [74] G. Golub, “Numerical methods for solving linear least squares problems,” Numerische Mathematik, vol. 7, pp. 206-216, 1965. [75] Damjan Lampret, OpenRISC 1200 IP Core Specification (Rev. 0.9.). [Online]. Available: http://www.opencores.com. [76] Joseph Yiu, Migrating from 8-, 16- to 32-bit microcontrollers. [Online]. Available: http://www.embeddeddesignindia.co.in/STATIC/PDF/201005/EDIOL_2010MAY20_MCP_TA_01.pdf?SOURCES=DOWNLOAD. [77] White Paper: The right microcontroller for low power applications, EnSilica. [Online]. Available: http://www.ensilica.com/pdfs/White_Paper_The_right_Microcontroller_ for_low-power_apps.pdf. [78] SourceMeter Line, Keithley Instruments. [Online] Available: http://www.keithley.com/data?asset=372. [79] Patterson, D. and Hennessy, J., “Computer architecture: A quantitative approach.” Morgan Kaufmann Publishers, Inc., 4’th edition, 2006. [80] Brian J. Gough, “An Introduction to GCC,” Network Theory Limited, United Kingdom, August 2005. [81] W.-M. Chen, W.-C. Yang, T.-Y. Tsai, H. Chiueh, and C.-Y. Wu, “The Design of CMOS General-Purpose Analog Front-End Circuit with Tunable Gain and Bandwidth for Biopotential signal recording system,” in Proc. IEEE EMBC, Boston, USA, pp.4784-4787, Sep. 2011. [82] N. V. Thakor, “Biopotentials and Electrophysiology Measurement,” in The Measurement, Instrumentation and Sensors Handbook, Boca Raton, CRC Press, 1999. [83] R.F. Yazicioglu, P. Merken, R. Puers, and C. Van Hoof, “A 60uW 60nV/rtHz Readout Front-End for Portable Biopotential Acquisition Systems,” ISSCC Digest of Technical Papers, pp.56-57, Feb. 2006. [84] M. J. Burke and D. T. Gleeson, “A micropower dry-electrode ECG preamplifier,” IEEE Trans. Biomed. Eng., vol. 47, no. 2, pp. 155–162, Feb. 2000. [85] C. C. Enz and G. C. Temes, “Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization,” in Proc. the IEEE, vol. 84, pp. 584-1614, Nov. 1996. [86] R. Schreier and G. Temes, Understanding Delta-Sigma Data Converters, Wiley-IEEE Press, 2005. [87] J.C. Candy and G.C. Temes, “Oversampling Methods for A/D and D/A Conversion,” IEEE Press, pp. 1-29, 1992. [88] Bonnie Baker and Miro Oljaca, “How the Voltage Reference Affects ADC Performance, Part 3,” Analog Applications Journal, 2009. [89] E. B. Hogenauer, ”An Economical Class of Digital Filters for Decimation and Interpolation,” IEEE Trans. Acoustics, Speech, and Signal Processing, vol. 29, no.2, pp. 455-162, Apr. 1981. [90] WISHBONE System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores (Rev. B.3), OpenCores Organization, Sept. 2002. [Online]. Available: http://cdn.opencores.org/downloads/wbspec_b3.pdf. [91] Karthik Soundarapandian, and Mark Berarducci, "Analog Front-End Design for ECG Systems Using Delta-Sigma ADC," Texas Instruments, Inc., Dallas, Texas, April 2010. [92] Nancy A. Collop, W. McDowell Anderson; Brian Boehlecke, David Claman, Rochelle Goldberg, Daniel J. Gottlieb, David Hudgel, Michael Sateia, Richard Schwab, “Clinical Guidelines for the Use of Unattended Portable Monitors in the Diagnosis of Obstructive Sleep Apnea in Adult Patients,” Journal of Clinical Sleep Medicine, vol. 3, no. 7, pp. 737-747, 2007. [93] 32 Channel Wireless Neural Headstage System, Triangle BioSystems, Int’l., March 2011. [Online]. Available: http://www.trianglebiosystems.com/Files/W32Brief.pdf. [94] W. E. Wright, “An efficient video on-demand model,” IEEE Comput.,vol. 34, no. 5, pp. 64–70, May 2001. [95] Richard Herveille, “SPI Core Specifications,” OpenCores Organization, January 2003. [96] Damjan Lampret, and Goran Djakovic, “GPIO IP Core Specification,” OpenCores Organization, December 2003. [97] Jacob Gorban, “UART IP Core Specification,” OpenCores Organization, August 2002. [98] IAR Embedded Workbench®, IAR System, Corporation. [Online]. Available: http://www.iar.com/en/Products/IAR-Embedded-Workbench/. [99] Lihong Jia, Yonghong Gao, Jouni Isoaho, and Hannu Tenhunen, "A new VLSI-oriented FFT algorithm and implementation," in Proc. IEEE ASIC Conference, pp.337-341, Sep 1998. [100] Wold E. H. and Despain A. M., “Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementation,” IEEE Trans. Comput., vol. 33, no. 5, pp. 414-426, May 1984. [101] M. Powell, S.-H. Yang, B. Falsafi, K. Roy, and T. N. Vijaykumar, "Gated-Vdd: A Circuit Technique to Reduce Leakage in Deep-Submicron Cache Memories," in International Symposium on Low Power Electronics and Design, 2000. [102] J. W. Tschanz, S. G. Narendra, Y. Ye, B. A. Bloechel, S. Borkar, and V. De, "Dynamic Sleep Transistor and Body Bias for Active Leakage Power Control of Microprocessors," IEEE Journal of Solid-State Circuits, vol. 38, pp. 1838-1845, November 2003. [103] M. Nakai, S. Akui, K. Seno, T. Meguro, T. Seki, T. Kondo, A. Hashiguchi, H. Kawahara, K. Kumano, and M. Shimura, "Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor," IEEE Journal of Solid-State Circuits, vol. 40, pp. 28-35, January 2005. [104] T. D. Burd, T. A. Pering, A. J. Stratakos, and R. W. Broderson, "A Dynamic Voltage Scaled Microprocessor System," IEEE Journal of Solid-State Circuits, vol. 35, pp. 1571-1580, November 2000. [105] Qing Wu, Pedram, M. Xunwei Wu , "Clock-gating and its application to low power design of sequential circuits," IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol.47, no.3, pp.415-420, Mar 2000. [106] J. T. Kao and A. P. Chandrakasan, "Dual-Threshold Voltage Techniques for Low-Power Digital Circuits," IEEE Journal of Solid-State Circuits, vol. 35, pp. 1009-1018, July 2000. [107] C.-H. Hua and W. Hwang, "A Power Gating Structure with Concurrent Data Retention and Intermediate Modes in 100nm CMOS Technology," in 15th VLSI Design/CAD Symposium, 2004. [108] K. Nose, M. Hirabayashi, H. Kawaguchi, S. Lee, and T. Sakurai, "VTH-Hopping Scheme to Reduce Subthreshold Leakage for Low-Power Processors," IEEE Journal of Solid-State Circuits, vol. 37, pp. 413-419, March 2002. [109] K. Usami and M. Horowitz, "Clustered Voltage Scaling Technique for Low-Power Design," in International Symposium on Low Power Electronics and Design, 1995. [110] D. E. Lackey, P. S. Zuchowski, T. R. Bednar, D. W. Stout, S. W. Gould, and J. M. Cohn, "Managing Power and Performance for System-on-Chip Designs Using Voltage Islands," in International Conference on Computer Aided Design, 2002. [111] R. Puri, L. Stok, J. Cohn, D. Kung, D. Pan, D. Sylvester, A. Srivastava, and S. Kulkarni, "Pushing ASIC Performance in a Power Envelope," in 40th Design Automation Conference, 2003. [112] Fu-Zen Shaw, Ching J Lai, and Ted H Chiu, “A low-noise flexible integrated system for recording and analysis of multiple electrical signals during sleep-wake states in rats,” Journal of Neuroscience Methods, vol. 118, issue 1, pp. 77-87, July 2002.
|