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研究生:藍冠維
研究生(外文):Guan-wei Lan
論文名稱:一個高性能無線多媒體嵌入式系統開發平台
論文名稱(外文):An embedded system development platform for high efficient wireless multimedia
指導教授:陳慶瀚陳慶瀚引用關係
指導教授(外文):Ching-Han Chen
學位類別:碩士
校院名稱:國立中央大學
系所名稱:資訊工程學系在職專班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:中文
論文頁數:105
中文關鍵詞:嵌入式系統無線多媒體GRAFCET
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隨著無線網路和行動計算的普及,近年來無線多媒體已經成為重要的產業發展趨勢之一。基於此一技術的品開發通常具有幾個特性:系統複雜度高、產品生命週期短、,技術與經驗難以有效累積。特別針對高速無線多媒體應用,由於缺乏具彈性的雛型化系統開發與驗證平台、導致產品研發不確定性增加以及上市時間延宕。本研究因此提出了一個高效能無線多媒體嵌入式系統開發平台,並結合MIAT嵌入式硬體設計方法論,提供系統快速雛型化和驗證。
硬體平台包含三個子模組:大容量FPGA核心板、高取樣率的A/D、D/A轉換板、以及5 GHz射頻電路模組板。透過本平台,開發者得以實現更寬的通道頻寬、更多的串流、以及更強的MIMO技術,讓多媒體資料傳輸速度大幅提升。此外我們還整合了gigabit乙太網路和5M像素的攝影機週邊模組來展示應用系統雛型開發的架構。
我們採用MIAT嵌入式硬體設計方法論進行基於此一平台的雛型系統開發。我們利用IDEF0工具來做階層式和模組化的分析,針對每一模組,使用GRAFCET工具進行離散事件的行為建模,最後將其合成為硬體電路,接著就可以在硬體平台上做實體電路的驗證。
結合了硬體平台和設計方法論,將使得高效能無線多媒體系統的開發更為快速可靠,採用MIAT方法論則使得設計流程變得清晰並具有可驗證性,而個別模組的設計概念與方法得以有效保留並再使用,對於複雜度越來越高、產品生命週期越來越短的系統開發問題,提供了一個良好的解決方案。

Due to the increasing popularity of wireless internet and mobile computing, wireless multimedia has become one of the important trends in related industries. Based on the technical & Product aspects of development, there are some significant attributes: systems are often complex, short on product lifespan, techniques and experiences are difficult to accumulate. Especially with high efficient wireless multimedia, the lacking of both flexible prototyping system and validation platform, result in the increasing of uncertainty with the product development, often leads to the delay or abort of the product launch. The Purpose of this research is to propose An embedded system development platform for high efficient wireless multimedia, by combining MIAT Methodology for Embedded Hardware Design, this research will in result, provide a rapid prototyping technology and validation platform.
The hardware platform is assemble by three sub-modules: High Density FPGA Kernel Board, High Sample Rate A/D、D/A Converter Board and a 5 GHz RF Module. By using the proposed platform, developer will be able to utilize wider bend with, more streams, and more powerful MIMO technology, in result of dramatically improvement of speed of the wireless multimedia Transmission. In addition, we also integrated gigabit Ethernet, and 5 megapixel camera peripheral module to demonstrate the infrastructure of the developing system’s prototyping.
We adapted the MIAT Methodology for Embedded Hardware Design to develop our prototyping platform. By utilizing IDEF0(Integration Definition for Function Modeling) to analyze Hierarchical and modular statues, on each and individual modular, after using GRAFCET to model on the Discrete Event, we can synthesize to a FPGA Implementation, and finally we will be able to do a circuit validation test on our proposed platform.
Combine our platform and Design Methodology, will directly result in speeding up and increasing reliability of the development of high efficient wireless multimedia system, adopting MIAT Methodology will result in clear and able to validate the designing process, with our modularize concept, will further provide the feasibility of retain and reuse of one’s designing methods and concepts, our proposed platform provides a fine solution in counter to the problems of rising complexity of the system, with the short product lifespan.

摘要 I
Abstract II
目錄 I
圖目錄 IV
表目錄 X
第一章 緒論 1
1.1、研究背景 1
1.2、研究目標 1
1.3、論文架構 2
第二章 高階系統設計方法論 3
2.1、IDEF0 系統階層模組解構 4
2.2、GRAFCET 6
2.3、GRAFCET離散事件的行為建模 7
2.3.1、 GRAFCET構件單元 7
2.3.2 、GRAFCET的分支架構 10
2.3.3、 GRAFCET的平行架構 11
2.3.4 、狀態轉移條件 13
2.3.5、動作(Action) 19
2.4、GRAFCET高階硬體電路合成 20
2.4.1、GRAFCET建構單元的VHDL合成規則 21
2.4.2、循序離散事件GRAFCET硬體合成 24
2.4.3、並時離散事件GRAFCET硬體合成 25
第三章 高性能無線多媒體平台 28
3.1、FPGA核心板 29
3.1.1、綜觀FPGA核心板 31
3.1.2、電源電路 33
3.1.3、Clock配置 41
3.1.4、晶片外記憶體 42
3.1.5、燒錄與Debug介面 44
3.1.6、可堆疊設計的高速板間連接器 45
3.2、高取樣率A/D、D/A轉換板 46
3.2.1、系統架構 46
3.2.2、電源電路 47
3.2.2、A/D Converter 55
3.2.3、D/A Converter 58
3.2.4、Clock Generator 60
3.2.5、Clock Distributor 62
3.2.6、介面配置 63
3.3、RF子模組 64
3.3.1、系統架構 65
3.3.2、電源電路 66
3.3.3、RF訊號收發電路 68
3.3.4、RF前端處理器電路 70
3.4、高性能無線多媒體平台開發流程與方法論 71
第四章 基於無線多媒體平台的矽智產設計 73
4.2、影像擷取影體電路GRAFCET行為建模 75
4.3、影像擷取硬體電路合成 76
第五章 實驗與系統整合驗證 77
5.1、DDR3硬體控制器(Hard core)驗證 77
5.2、影像擷取控制器驗證 79
5.3、乙太網路控制器 81
5.4、基本無線數位訊號傳輸的硬體控制器 82
第六章 結論 84
6.1、結論 84
6.2、未來展望 85
參考文獻 86

[1] Ching-Han Chen, Tun-Kai Yao, Jia-Hong Dai, and Chen-Yuan Chen, “A pipelined multiprocessor SOC design methodology for streaming signal processing”. Journal of Vibration and Control, doi: 10.1177/1077546312458821.
[2] Ching-Han Chen, Chia-Ming Kuo, Sheng-Hsien Hsieh and Chen-Yuan Chen , “High efficient VLSI implementation of probabilistic neural network image interpolator”. Journal of Vibration and Control, doi: 10.1177/1077546312458822.
[3] Ching-Han Chen, Chia-Ming Kuo, Chen-Yuan Chen, and Jia-Hong Dai, “The design and synthesis using hierarchical robotic discrete-event modeling”, Journal of Vibration and Control, 2012. doi: 10.1177/1077546312449645
[4] Mayer, R.J.; ”IDEF0 Function Modeling “, Air Force Systems Command, May , 1992.
[5] Colquhoun G, J; Baines R.W.; “Ageneric IDEF0 model of process planning”, Int. J. Production Research, Vol.29, No11, pp2239-2257, 1991.
[6] Colquhoun G, J; Baines R.W.; “A generic IDEF0 model of process planning”, Int. J. Production Research, Vol.29 No 11, pp2239-2257, 1991.
[7] Zaytoon, J.; Carre-Menetrier, V.; “From discrete-event systems to hybrid systems”, IEEE Systems, Man, and Cybernetics, Vol. 1, pp159-164, 1999.
[8] David, R.; "Grafcet :A powerful tool for specification of logic controllers", IEEE Trans on control systems technology, Vol.3, No 3, p253-268, 1995.
[9] Linkens, D.A.; Tanyi, E.B.; "Design and implementation of a hybrid modeling and simulation strategy for integrated control", IEEE Computer-Aided Control System Design, pp 352 –357, 1996.
[10] Ross, D. T.; “Applications and Extensions of SADT”, IEEE, pp. 23-34, 1985.
[11] FIPS 183, Integration Definition for Function Modeling (IDEF0),National Instituteos Standards and Technology, 1993.
[12] Mayer, R. J., “IDEF0 Function Modeling”, Knowledge Based System Inc., 1994.
[13] Ang, C. L.; Luo, M.; Gay, R. K. L., ”Knowledge-based approach to the generation of IDEF0 models”, Computer Integrated Manufacturing Systems, Volume: 8, Issue: 4, November, 1995, pp. 279-290.
[14] Gill, Arthur , "Single-Channel and Multichannel Finite-State Machines", Computers, IEEE Transactions on Volume: C-19, Issue: 11, Publication Year: 1970 , pp. 1073-1078

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