臺灣博碩士論文加值系統

本論文分為三部份，首先在基頻(Baseband)架構中利用互補碼(Complementary Code Keying, CCK)的特質，針對頻率偏移及補償策略進行研究。本研究提出一種在粗調或微調間切換的頻率偏移估算子系統，以便達到較低的估算錯誤值(Estimation Error)及位元失誤率(Bit Error Rate)。本架構主要利用互補碼的特殊特性，利用簡單的方法萃取到頻率偏移值，而不須要藉由後續的訓練序列碼(Training Sequence)來完成。本研究非常適合應用於以互補碼為基礎的無線區域網路系統中，並達到高速傳送資料的目的。電腦模擬結果，證明本研究可達到優良的系統效能。
本論文接著針對互補碼在無線通信系統基頻中，以系統性的模組設計(Systematic Modular Design)，藉以降低系統複雜度及復原時序(Timing Recovery)的策略進行研究。本研究推導出分別為集中式(Centralized Type, CENT)、分散式(Distributed Type, DT)及混合式解調器(Demodulator)的架構，進行評估分析。互補碼解調器架構以系統性的模組化來呈現，是為了能簡化晶片的研製，其中對於混合式CENT_DTMax模組化架構設計，可改善基頻晶片的應用性及可適性，降低複雜度，並保有簡化的頻率偏移估算功能。經由系統的模擬分析，其保有不錯的效能。
最後，對於利用單一雙噪(Single Dual-chirp)前置突波(Preamble Burst)信號，在頻率非選擇性衰落(Frequency-nonselective Fading)的環境下，進行時序延遲及頻率偏移估算的研究。由於雙噪信號自相關函數(Autocorrelation Function)的形狀，不會因為頻率偏移而改變，本研究提出最大相似性(Maximum-likelihood)法則，只利用一對虛擬雜訊匹配濾波器(Pseudo-noise Matched Filters)，進行時序延遲估算。取代傳統的一連串的匹配濾波器方式，並且趨近張米樂界限(Miller-Chang Bound, MCB)，此方法係使用通道增益及起始相位當作滋擾參數(Nuisance Parameters)，做為時序延遲估算的方式。利用雙噪信號轉換的不變性(Invariance)特性，本研究提出一種利用頻域的雜訊匹配濾波器，趨近張米樂界限，估算頻率偏移的技巧。本研究提出完成最大可能性的時序延遲和頻率偏移的方法，達到效能的界限。利用電腦模擬及嚴格的統計分析，可看出它的優點。

This dissertation covers three topics concerning strategies for estimating the time delay and frequency offset. It first examines a frequency offset estimation and compensation strategy that exploits Complementary Code Keying (CCK) in a baseband architecture. The proposed approach can switch between coarse and fine frequency offset estimation subsystems to achieve lower estimation errors and lower bit-error rates (BERs). The architecture primarily exploits the characteristics of the CCK code set; thus it simply extracts the frequency offset without any assistance from a training sequence. The proposed scheme is very effective when used in a CCK-based WLAN system for the purpose of increasing data transmission rate. Computer simulations demonstrate that the proposed scheme and its realization in architecture provide superior overall system performance.
Besides, this dissertation also examines the systematic modular design of a Complementary Code Keying (CCK) baseband modem for wireless communication network applications for reduced complexity. Both centralized-type (CENT) and distributed-type (CENT_DTMax) of CCK demodulator architectures are developed in this dissertation. The CCK demodulator is formulated to facilitate a modular design method to simplify its implementation. Furthermore, a mixed-type demodulator, named as CENT-DTMax, is developed to improve the applicability and feasibility of a modular-based baseband modem. The performance of the proposed demodulator is comparable to that of existing CCK demodulators, since it exhibits both low complexity and simplified clock offset estimation. Additionally, computer simulations indicate that the proposed architecture provides favorable overall system performance.
The last proposed strategy for estimating timing delay and frequency offset exploits a single dual-chirp preamble burst in frequency-nonselective fading environments. Since the shape of the autocorrelation function of the dual-chirp signal does not significantly vary with the different frequency offset values, the proposed scheme estimates a maximum-likelihood (ML) timing-delay by using a single pair of pseudo-noise matched filters (PN MFs), rather than by conventionally using a continuum of MFs. It therefore approaches the Miller-Chang bound (MCB) in its estimate of the timing-delay with a channel gain and an initial phase error as nuisance parameters. By exploiting the invariance under transformation of the dual-chirp signal, the proposed scheme estimates a frequency offset by exploiting frequency-domain PN MFs, and so its estimates of frequency-offset approaches the MCB. The proposed technique provides estimates of ML timing-delay and frequency offset to evaluate the performance bounds. The advantages of the proposed technique are confirmed by rigorous statistical analysis as well as comprehensive computer simulations.

中文摘要…………………………………………………………i
英文摘要…………………………………………………………iii
誌謝 …………………………………………………………v
目錄 …………………………………………………………vi
圖目錄 …………………………………………………………vii
表目錄 …………………………………………………………ix
一、Introduction……………………………………………1
1-1 Overview of CCK Properties…………………………1
1-2 Overview of CCK Modular Design…………………2
1-3 Overview of Dual-chirp Signal Properties…………3
1-4 Section Organization…………………………………6
二、A Frequency Offset Estimation Technique Based on CCK for a WLAN Receiver Design…………………7
2-1 Signal Model and System Description..………………7
2-2 Frequency Offset Estimation…………………………10
2-3 Simulation Experiments.………………………………20
三、A Modular Design for CCK Baseband Modem………26
3-1 Demodulator Design…………………………………26
3-2 Performance Analysis…………………………………35
3-3 Simulation Results and Discussion…………………43
四、Timing-delay and Frequency-offset Estimations for Initial Synchronization on Time-varying Rayleigh Fading Channels 46
4-1 Signal Model and System Derivation…………………46
4-2 Performance Evaluation………………………………57
4-3 Discrete-Time Implementation……………………66
4-4 Numerical Results..…………………………………69
五、Conclusion…………………………………………76
參考文獻 …………………………………………………78

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