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研究生:林家君
研究生(外文):Lin, Chia-Chun
論文名稱:On Minimizing the Implementation Cost of Threshold Network by Rewiring
論文名稱(外文):藉由重接線來減少臨界值邏輯電路實作成本的研究
指導教授:王俊堯王俊堯引用關係
指導教授(外文):Wang, Chun-Yao
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:英文
論文頁數:26
中文關鍵詞:臨界邏輯重接線
外文關鍵詞:threshold logicrewiring
相關次數:
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近來,由於臨界邏輯電路在實作上的快速發展,一併帶動了許多臨界邏輯的相關研究,像是合成、驗證與測試等等。相較於以線性規劃為基底的合成演算法,我們提出了一個藉由重接線來減少臨界值邏輯電路實作成本的演算法。此外,我們也改善既有的臨界邏輯閘簡化演算法。臨界效應輸入向量是一個臨界邏輯閘輸入向量的子集,我們證明了臨界效應輸入向量足以驗證兩個臨界邏輯閘是否相等,不需要比較兩個臨界邏輯閘的真值表。而這也有效的加速了我們驗證臨界邏輯閘功能性所需的時間。
Recently, there have been many works focusing on synthesis, verification, and testing of threshold circuits due to the rapid development in efficient implementation of threshold logic circuits. To minimize the hardware cost of threshold circuit implementation, this paper proposes a heuristic that consists of rewiring operations and a simplification procedure. Additionally, a subset of input vectors of a gate, called critical-effect vectors, are proved to be complete for formally verifying the equivalence of two threshold logic gates, instead of the whole truth table in this paper. This achievement can accelerate the equivalence checking of two threshold logic gates. The experimental results show that the proposed heuristic can efficiently reduce the implementation cost.
1 Introduction
2 Preliminaries
2.1 Threshold logic
2.2 Critical-effect vectors
2.3 Target wire removal and rectification network construction
2.4 Weight transformation
3 Cost minimization algorithm
3.1 Overview
3.2 Target wire selection
4 Simplification
4.1 Functional equivalence of two LTGs
4.2 Simplification overview
4.3 Simplification flow
5 Experimental results
6 Conclusion


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