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研究生:陳嘉弘
研究生(外文):Chen, Chia-Hung
論文名稱:應用於人體區域網路之低功耗射頻傳收機
論文名稱(外文):A Low Power Wireless Transceiver for Multi-Standard Body Area Network
指導教授:黃柏鈞黃柏鈞引用關係
指導教授(外文):Huang, Po-Chiun
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:英文
論文頁數:61
中文關鍵詞:無線傳收機低功耗人體區域網路藍芽低功耗IEEE 802.15.6。
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本論文提出一個應用於人體區域網路之低功耗射頻傳收機。此射頻傳收機包
含了頻率合作器、發射機、接收機以及一個數位基頻處理器。透過晶片實體層的
設計並搭配可重置式基頻處理器,來滿足藍芽低耗能、ZigBee、IEEE 802.15.6三種無線傳輸規範。
接收機在 ZigBee 或 IEEE 802.15.6 模式下,使用正交直接降頻的架構來避免表面聲波濾波器的需求。在藍芽低耗能模式下,則採用單路低中頻架構,藉由將中頻頻率選在訊號寬度的一半,可減低鏡像問題,並進而可關閉其中一路的正交路徑,節省功率消耗。射頻前端電路採用被動低雜訊放大器與混頻器,可在不消
耗功率的情況下,仍有足夠的雜訊表現。可變增益放大器與低頻濾波器都可滿足
不同規範的需求。
頻率合成器採用整數型鎖相迴路。壓控振盪器操作在兩倍頻率,藉由除二的
功能可以進一步得到正交的相位訊號。在藍芽低耗能與 IEEE 802.15.6 發射模式下,頻率調制訊號直接饋給壓控振盪器,為了滿足 IEEE 802.15.6 可變包絡線訊號,除了頻率調制訊號外,瞬時振幅資訊經由另一路,直接調制數位控制功率放大器。
本設計採用零點一八互補式金氧半導體製程,晶片面積為 2.8 × 2.1 毫米平方。接收機在藍芽低耗能模式可達到-63dBm 輸入靈敏度。在 IEEE 802.15.6 模式,輸入600Kbps 符碼速率下,誤差向量幅度為 6.77 百分比。受限於打線與製程偏移影響,發射機輸出功率下降至-18 dBm。在一點二伏特之低電壓提供下,接收機在藍芽低耗能與 IEEE 802.15.6 (ZigBee)操作模式下,分別消耗 4.8 毫瓦特與8.7 毫瓦特,而發射機在輸出-18dBm 功率下消耗 12 毫瓦特。
In this thesis, a low-power multi-standard wireless transceiver for body area network is designed, analyzed and implemented. This transceiver contains a frequency synthesizer, a transmitter, a receiver and a digital baseband processor. The physical layer and the recon-
figurable baseband support standards of Bluetooth low energy (BT-LE), ZigBee and IEEE 802.15.6 Narrow Band(NB).
The receiver in ZigBee and IEEE 802.15.6 modes uses direct conversion with quadrature path to avoid bulky saw filter. In BT-LE operation, a single path low-IF architecture with a
lowpass filter is chosen while the IF is at half signal bandwidth. The passive LNA and mixer are adopted in RF front-end to have lowest power consumption under moderate noise performance requirement. The following analog circuits have variable gain amplifiers (VGAs) and tunable lowpass filters to satisfy the requirements for different standards. One of the quadrature path in mixer and analog baseband circuits can be shut down for power saving in the BT-LE mode.
The frequency synthesizer uses an integer-N PLL. The VCO oscillates at twice of RF frequency. The quadrature phases are further generated by the divide-by-two function. Dur-
ing BT-LE and IEEE 802.15.6 transmitting, the frequency modulation signal is fed into VCO without closed-loop control of PLL. To satisfy the variable-envelope signal for IEEE 802.15.6, the instantaneous amplitude information modulates the digitally controlled power amplifier (DCPA), directly. Thus, the modulation scheme can be synthesized by frequency modulation from VCO and amplitude modulation from DCPA.
This work implemented in a 0.18µm CMOS technology occupies 2.8 × 2.1 mm 2 . The receiver achieves -63 dBm receiver input sensitivity (for 0.1% bit error rate) in BT-LE mode.
1The 6.77% EVM is measured for IEEE 802.15.6 at symbol rate of 600 kbps. Transmitting output power is dropped to -18 dBm due to the bondwire effects and corner process variation. The transceiver consumes 4.8mW/8.7mW during BTLE/802.15.6(ZigBee) receiving mode and 12mW during transmitting at -18dBm output power from a 1.2V supply voltage respectively.
1 Introduction 1
1.1 Overview . . . . . . . . . . . . 2
1.2 Thesis Organization . . . . . . . . . 2
2 Receiver Architecture 3
2.1 Heterodyne . . . . . . . . . . . . 3
2.2 Direct Conversion . . . . . . . . . . 5
2.3 Wide-band IF with Dual Conversion . . . . . 6
2.4 Low-IF . . . . . . . . . . . . . . 7
2.5 Single Path Low-IF . . . . . . . . . 8
2.6 Receiver Structure in this Work . . . . 9
3 System Specifications 11
3.1 Frequency Plan . . . . . . . . . . . 11
3.2 Modulation Scheme . . . . . . . . . 12
3.3 Sensitivity . . . . . . . . . . . 14
3.4 Intermodulation . . . . . . . . . . 15
4 Circuit Implementation of the Low Power Wireless Receiver 19
4.1 RF Front-end . . . . . . . . . . . 20
iiCONTENTS
4.1.1 Impedance Transformers . . . . . . . . . . . . . . . . . . . . . . . 21
4.1.2 Single Balanced Passive Mixer . . . . . . . . . . . . . . . . . . . . 23
4.1.3 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2 Baseband Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.1 Variable Gain Amplifier . . . . . . . . . . . . . . . . . . . . . . . 28
4.2.2 Filter Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.3 Receiver Measurement Results and Layout . . . . . . . . . . . . . . . . . . 36
5 Circuit Implementation of the Low Power Wireless Transmitter 42
5.1 Transmitter Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.2 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.2.1 Pre-drive Amplifer Design . . . . . . . . . . . . . . . . . . . . . . 51
5.2.2 DCPA Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.3 Transmitter System Measurement Results . . . . . . . . . . . . . . . . . . 55
6 Conclusions 60
6.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
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