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研究生:劉鑑鼐
研究生(外文):Liou, Jian-Nai
論文名稱:應用於太陽能發電系統的數位訊號處理器
論文名稱(外文):A Digital Signal Processor for Photovoltaic Generation Systems
指導教授:馬席彬
指導教授(外文):Ma, Hsi-Pin
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:英文
論文頁數:75
中文關鍵詞:數位訊號處理器太陽能發電系統最大功率點追蹤預測式電流控制微處理器局部陰影
外文關鍵詞:Digital Signal ProcessorPhotovoltaic Generation SystemMaximum Power Point TrackingPredictive Current ControlMicrocontrollerPartial Shading8051
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在現實中,一個太陽能發電系統的運作條件不是時刻穩定的。在太陽能板上的陽光照度不但在整個白天改變而且有時候經過的雲朵或是影子也會改變。為了要滿足這些動態的運作條件,在一個太陽能發電系統中增加一個控制器是有必要的。傳統上,在一個太陽能發電系統中的控制器是以類比電路所實現。在這篇論文中,控制器是由集成數位電路所構成。相較於類比電路,數位電路有較佳的靈活性和較低的複雜度可以在一個太陽能發電系統上實行更多的功能。
該控制器是可編程的並且有能力以高速來執行多個程式。控制一個太陽能發電系統要執行兩個程式。一個是〝修改版預測式電流控制(MPCC)〞而另一個是〝最大功率點追蹤(MPPT)〞。程式被修改用以適應定點運算和縮短執行時間。
最終的設計是一個有著時脈100MHz的雙核心處理器位於一個現場可程式閘陣列(FPGA)平台上。它負責控制一個3通道10位元的類比數位轉換器(A/D)在1MHz的取樣頻率下取得必要的資料。主要的輸出是一個有最小精度是0.002占空比的100kHz脈沖寬度調變(PWM)訊號。每個核心有1千位二進位位元組的程式記憶體和256位元組的資料記憶體。一個多核心控制器負責控制核心到核心和核心到外面的交流。數位脈沖寬度調節器(DPWM)根據MPCC和MPPT的計算結果產生一個PWM訊號。MPCC程式搭配一個2千位二進位位元組的查表(LUT)記憶體執行並且當它在100MHz的單核心上操作時花費了2.74μs,而MPPT程式在同樣條件下花費了2.58μs~3.1μs。
In reality, the operating conditions of a photovoltaic (PV) generation system are not constantly
stable. The illumination of sunlight on PV panels not only changes throughout the day
but also changes with the passing of clouds or shadows sometimes. In order to satisfy these
dynamic operating conditions, adding a controller in a PV generation system is necessary.
Traditionally, the controller in a PV generation system is realized by analog circuits. In this
thesis, the controller is composed of integrated digital circuits. Compared with analog circuits,
digital circuits have more flexibility and less complexity of implementing more functions on
a PV generation system.
The controller is programmable and is capable of executing multiple programs at high
speed. Two programs are executed to control a PV generation system. One is ”modified predictive
current control (MPCC)” and the other is ”maximum power point tracking (MPPT)”.
Programs are modified to adapt fixed-point calculation and to shorten execution time.
The final design is a dual-core processor with 100MHz clock rate on a field-programmable
gate array (FPGA) platform. It is responsible for controlling a 3-channel 10-bit analog-todigital
converter (A/D) with 1MHz sampling rate to obtain the required data. The main output
is a 100kHz pulse-width modulation (PWM) signal with minimum precision of 0.002 duty
cycle. Each core has program memory with 1KB and data memory with 256bytes. A multicore
control unit is responsible for controlling communication between core to core and core
to periphery. Digital pulse-width modulator (DPWM) generates a PWM signal according to
the calculation results of MPCC and MPPT. The MPCC program is executed with a 2KB
look-up table (LUT) memory and consumes 2.74s when operating at 100 MHz on a single
core while the MPPT program consumes 2.58s 3.1s under the same conditions.
Abstract i
1 Introduction 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Motivation of Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Main Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Organization of Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Photovoltaic Generation System 5
2.1 System Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Photovoltaic Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.1 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 DC/DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.1 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Algorithms for Digital Controller . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4.1 Predictive Current Control . . . . . . . . . . . . . . . . . . . . . . . 10
2.4.2 Maximum Power Point Tracking . . . . . . . . . . . . . . . . . . . . 11
2.5 Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5.1 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5.2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.6 Digital Pulse-Width Modulator . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6.1 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6.2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Digital Signal Processor 17
3.1 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 Modified Microcontroller [1, 2] . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3.2 Improvement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 Program Memory and Look-Up Table Memory . . . . . . . . . . . . . . . . 24
3.5 Multi-Core Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.6 Digital Pulse-Width Modulator . . . . . . . . . . . . . . . . . . . . . . . . . 28
4 Design Flow 29
4.1 Requirement for Digital Signal Processor . . . . . . . . . . . . . . . . . . . 29
4.2 Basic Calculation Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2.2 Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3 Calculation Data Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
4.4 Algorithm to Assembly Code . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.5 Timing of Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.6 Speed Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.6.1 Speed Problem and Solutions . . . . . . . . . . . . . . . . . . . . . 45
4.6.2 Software Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.6.3 Modified Predictive Current Control . . . . . . . . . . . . . . . . . . 47
4.6.4 Modified Maximum Power Point Tracking . . . . . . . . . . . . . . 51
4.7 Communication with Analog-to-Digital Converter . . . . . . . . . . . . . . . 52
5 Simulation and Implementation Results 55
5.1 Platform of Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.2 Field-Programmable Gate Array Simulation Results . . . . . . . . . . . . . . 57
5.3 Photovoltaic Generation System Implementation Results . . . . . . . . . . . 61
5.4 Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
6 Future Work and Conclusion 69
6.1 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
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