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研究生:蔡承志
研究生(外文):Cheng-Chin Tsai
論文名稱:IEEE 802.16正交分頻多工實體層軟體定義無線電之繪圖處理器實現
論文名稱(外文):A GPU Implementation of IEEE 802.16 OFDM Physical Layer for Software-Defined Radio
指導教授:陳少傑陳少傑引用關係
指導教授(外文):Sao-Jie Chen
口試委員:林茂昭游竹熊博安
口試委員(外文):Mao-Chao LinChu YuPao-Ann Hsiung
口試日期:2013-06-25
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:英文
論文頁數:91
中文關鍵詞:軟體定義無線電802.16實體層繪圖處理器統一計算架構
外文關鍵詞:SDR802.16WiMAXPHYGPUCUDA
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無線通訊中的基頻數位訊號處理通常具有很高的計算複雜度,因此在實作軟體定義無線電的系統時,最大的挑戰在於如何在有限的計算資源下達到即時(Real Time)處理,以滿足通訊標準所規定的傳輸速率。近年來,開始有研究嘗試利用繪圖處理器(Graphic Processing Units)來取代傳統軟體定義無線電的平台,試圖利用其具有的大量平行計算單元來改善以往平台運算能力不足的缺點,但目前軟體定義無線電的系統仍缺乏一個能夠有效率使用繪圖處理器硬體資源的平行計算框架。為了解決這個問題,在本報告中我們針對大部分基頻訊號處理的計算提出不同層級的平行計算方法,透過將這些方法實作在繪圖處理器的平台上,不僅能大幅提升我們軟體定義無線電系統的效能,使其達到即時運算的要求,也提供了新通訊標準的開發者一個能夠加速模擬的解決方案。在繪圖處理器的幫助下,我們的系統最後能達到大約20Mbps的處理速度,這也間接證明了使用繪圖處理器作為軟體定義無線電平台的可行性。

Wireless baseband processing, which usually requires high computation complexity and high data throughput, is regarded as the most challenging issue for Software-Defined Radio (SDR) systems. To relieve the difficulty in SDR systems, a modern Graphics Processing Unit (GPU) is chosen as implementation platform due to its numerous powerful arithmetic logic units. However, because of the lack of the universal parallel programming framework for SDR systems, it is difficult to take advantage of the GPU architecture. To overcome this problem, in this thesis, we propose the different levels of parallelism that can be exploited on GPU platforms for most baseband functions. The parallel approaches of each baseband function implemented on GPU platform can not only enhance the performance of baseband signal processing to meet the real-time requirement, but also gives an SDR developer the faster solutions to those time-consuming baseband functions if GPU is used to prototype a novel wireless protocol. In our experimental tests, a GPU platform can support about 20Mbps data rate for baseband signal processing at most. This result can also verify the effectiveness of our proposed GPU framework for SDR systems.

ABSTRACT i
LIST OF FIGURES vii
LIST OF TABLES xi
CHAPTER 1 INTRODUCTION 1
1.1 Motivation 1
1.2 Introduction to IEEE 802.16-2004 Networks 2
1.3 Introduction to GPU and CUDA 5
1.4 Thesis Organization 7
CHAPTER 2 OFDM SYSTEM AND TRANSCEIVER ARCHITECTURE 9
2.1 Overview of OFDM System 9
2.1.1 OFDM History 9
2.1.2 Continuous-Time OFDM Symbols 11
2.1.3 Discrete-Time OFDM Symbols 13
2.1.4 DFT and IDFT 13
2.1.5 Guard Interval and Cyclic Prefix 14
2.2 OFDM Symbol Descriptions and System Parameters 16
2.2.1 OFDM Symbol Structure 16
2.2.2 OFDM System Parameters 17
2.2.3 Frame Structure 18
2.3 Channel Coding 21
2.3.1 Randomization 21
2.3.2 Forward Error Correction 23
2.3.2.1 Reed-Solomon Encoder 23
2.3.2.2 Reed-Solomon Decoder 24
2.3.2.3 Convolutional Code Encoder 26
2.3.2.4 Convolutional Code Decoder 28
2.3.3 Interleaver 30
2.3.4 Data Modulation 31
2.3.5 Pilot Modulation 32
2.3.6 Preamble Modulation 33
2.4 Synchronization and Channel Estimation in Inner Receiver 34
2.4.1 Timing Synchronization 35
2.4.1.1 Frame Detection 35
2.4.2 Frequency Synchronization 38
2.4.2.1 Carrier Frequency Offset 38
2.4.2.2 Coarse CFO Estimation and Compensation 40
2.4.2.3 Fine CFO Estimation and Compensation 41
2.4.2.4 Sampling Clock Offset and Residual CFO 42
2.4.2.5 SFO and RCFO Estimation and Compensation 44
2.4.3 Channel Estimation and Compensation 46
CHAPTER 3 IMPLEMENTATION OF SDR SYSTEM ON GPU 49
3.1 System Profiling 49
3.2 Design Flow of GPU Applications 50
3.3 Implementation of ALP Process on GPU 52
3.3.1 Implementation of Reed-Solomon Encoder on GPU 53
3.3.1.1 Definition of Reed-Solomon Code 53
3.3.1.2 Alternative Definition of Reed-Solomon Code 54
3.3.1.3 Cauchy Reed-Solomon Code 55
3.3.1.4 Implementation of CRS Encoder on GPU 58
3.3.2 Implementation of Convolutional Code Encoder on GPU 59
3.3.3 Implementation of Convolutional Code Decoder on GPU 60
3.3.3.1 Implementation of Viterbi Algorithm on GPU 61
3.3.3.2 BCJR Algorithm 62
3.3.3.3 Bi-Directional Viterbi Algorithm on GPU 64
3.4 Implementation of DLP Process on GPU 68
CHAPTER 4 EXPERIMENTAL RESULT AND ANALYSIS 71
4.1 Pseudo Channel Model 71
4.1.1 Multipath Fading Model 71
4.1.2 AWGN Model 72
4.1.3 CFO Model 74
4.1.4 SFO/RCFO Model 74
4.2 SDR Design Environment 76
4.3 CUDA Optimization 77
4.3.1 Execution Configuration Optimization 77
4.3.2 Memory Optimization 78
4.4 Experimental Results for GPU Implementation 79
4.4.1 Experimental Results for RS Encoder on GPU 79
4.4.2 Experimental Results for Viterbi Decoder on GPU 81
4.4.3 Experimental Results for Overall System on GPU 83
4.4.4 Comparison System of Throughput with Standard Requirement 85
CHAPTER 5 CONCLUSION 87
REFERENCE 89


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