(3.236.100.86) 您好!臺灣時間:2021/05/06 14:58
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果

詳目顯示:::

我願授權國圖
: 
twitterline
研究生:尤軒智
研究生(外文):Joshua You
論文名稱:用於雲端系統之嵌入式硬體開機介面程式的設計與實作
論文名稱(外文):Design and Implementation of an Embedded Boot Manager in a Cloud Environment
指導教授:黃士嘉黃士嘉引用關係
指導教授(外文):Shih-Chia Huang
口試委員:張原豪黃文增蔡偉和
口試委員(外文):Yuan-Hao ChangWen-Tzeng HuangWei-Ho Tsai
口試日期:2012-12-07
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:電資碩士在職專班研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:101
語文別:中文
論文頁數:79
中文關鍵詞:開機介面程式PC開機流程嵌入式硬體串列高速介面訊號完整度
外文關鍵詞:Option ROM imageservice routineembedded hardwaresignal integrity
相關次數:
  • 被引用被引用:0
  • 點閱點閱:99
  • 評分評分:系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
這篇論文是實作型的論文,分成兩部分;第一個部分是設計並實作開機介面程式,此開機介面程式會在Client端PC開機時,負責提供使用者介面並建立與嵌入式系統韌體溝通的管道,然後安裝嵌入式硬體平台及它的Service Routine到PC裡頭,使PC能透過硬體平台進行遠端開機並載入作業系統直到SCSI driver接手為止。程式設計時須按照PC開機流程的各項規範及PnP Option ROM的格式規定來實作,儘量降低與各廠牌PC不相容的機率,同時也要達成委託單位對使用者介面的規劃及功能。
第二個部分是設計並實作嵌入式硬體平台,此硬體平台會被用來驗證開機介面程式是否能正常運作。首先我們會討論此硬體平台的設計:包含系統核心SoC的選擇,整體架構的設計,系統參考時脈的設計,DDR2 SDRAM子區塊的設計,MPP功能的規劃及設計,NAND Flash子區塊的設計,乙太網路實體層介面的設計,三個串列高速介面:PCI Express、SATA及USB的設計,與最後整個電源供應的規劃及設計。接著在硬體真正實作出來後,利用儀器來檢驗各硬體區塊的訊號完整度是否有符合業界的規範。

This thesis consists of two parts. For part 1, we design and implement an Option ROM image. When PC turned on, this image will offer a user interface, establish a communication with embedded system, install hardware device and its service routine, so that PC can boot and load OS from server through hardware device till OS driver takes over. In this part, we have to follow the rules of “PC Boot Sequence”, comply with the format of “PnP Option ROM”, reduce incompatible issues, and design a user interface that meets all requirements in this project.
For part 2, we design and implement an embedded hardware in a cloud environment. The role of this hardware is to be a bridge between front-side “Option ROM/Driver” and rear-side “Server/Storage”. We design whole hardware architecture: include choice of SoC, system clock, DDR2 SDRAM, MPP, NAND Flash, Ethernet PHY, PCI Express, SATA, USB, and power supply. When implementation is done, we measure all kinds of signal integrity just mentioned before, and make sure they are compliance with respective specifications.

中文摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
表目錄 vi
圖目錄 vii
第一章 導論 1
1.1 計畫源起與預定達成之目標 2
1.2 論文大綱概述 2
第二章 開機介面程式的相關知識 3
2.1 IPL Device/Priority及BCV Priority 3
2.2 Option ROM與PC開機流程 7
2.3 如何發展一個Option ROM 11
第三章 開機介面程式的設計與實作 18
3.1 開機介面程式的整體架構 18
3.2 [Initial]模組的設計 19
3.2.1 解碼流程 21
3.2.2 記憶體控制流程 21
3.2.3 鍵盤控制流程 23
3.2.4 資料交換流程 25
3.2.5 處理命令及按鍵程序 29
3.2.6 各種開機狀態碼的前置處理 32
3.3 [BCV]模組的設計 33
3.4 [INT 13h]模組的設計 35
3.4.1 記憶體控制流程 37
3.4.2 檢查Drive Number 38
3.4.3 功能:0x02、0x03 38
3.4.4 SCSI_Command_Process 39
3.4.5 功能:0x41 41
3.4.6 功能:0x42、0x43 41
3.4.7 功能:0x48 42
第四章 嵌入式硬體的設計與實作 44
4.1 系統架構設計 44
4.2 參考時脈的設計 47
4.3 DDR2 SDRAM的設計 48
4.4 MPP與NAND Flash Memory的設計 49
4.5 Ethernet PHY及RJ-45 connector的設計 50
4.6 High Speed Serial Interface的設計 52
4.7 系統Power Supply的設計 56
第五章 嵌入式硬體的測試驗證 59
5.1 電源品質的測量結果 59
5.2 Crystal Oscillator的測量結果 65
5.3 DDR2 SDRAM的測量結果 66
5.4 PCI Express的測量結果 68
5.5 SATA的測量結果 72
5.6 USB的測量結果 73
5.7 Ethernet PHY的測量結果 74
第六章 結論與未來展望 76
&;#21442;考文獻 78

1. Jinho Hwang and T. Wood, “Adaptive dynamic priority scheduling for virtual desktop infrastructures,” in Quality of Service (IWQoS), 2012 IEEE 20th International Workshop on, June 2012, pp. 2-8.
2. ISACA authors, “The white paper of Virtualized Desktop Infrastructure (VDI),” ISACA Emerging Technology White Paper, May 2012, pp. 5-11.
3. Li Jinhui, Zhang Ke, and Zhang Fang, “Network center’s highly-efficient management solutions based on intel PXE-based remote cloning system,” in Advanced Computer Control (ICACC), 2011 3rd International Conference on, Jan. 2011, pp. 408-411.
4. Intel Corporation and SystemSoft BIOS, “Preboot Execution Environment (PXE) Specification Version 2.1,” Published by Intel Corporation, Sept. 1999, pp. 4-11.
5. Yi-Cheng Chung, “Design and Implementation of an iSCSI Storage Protocol on HBA Initiator,” Master thesis of Science, Electrical Engineering, Institute of Computer and Communication, National Cheng-kung University, Taiwan, July 2005, pp. 3-20.
6. John L. Hufferd, “iSCSI: the universal storage connection,” Published by Pearson Education Inc., ISBN: 0-201-78419-X, Oct. 2002, pp. 49-69.
7. Compaq Computer Co., Phoenix Technologies Ltd., and Intel Corporation, “BIOS Boot Specification Version 1.01,” Published by Phoenix Technologies Ltd., Jan. 1996, pp. 9-31.
8. Compaq Computer Co., Phoenix Technologies Ltd., and Intel Corporation, “Plug and Play BIOS Specification Version 1.0A,” Published by Phoenix Technologies Ltd., May 1994, pp. 8-22.
9. Intel Corporation, “Developing an Expansion ROM for the i960&;reg; Rx I/O Processor,” Published by AP-756, Intel Corporation, Dec. 1997, pp. 1-19.
10. PCI Special Interest Group, “PCI BIOS SPECIFICATION Revision 2.1,” Published by PCI Special Interest Group, Aug. 1994, pp. 7-22.
11. Curtis E. Stevens, “BIOS Enhanced Disk Drive Specification Version 3.0 Rev 0.9,” Published by Phoenix Technologies Ltd., Apr. 1998, pp. 3-18.
12. S. Albert, S. Kalms, C. Weiss, and A. Schramm, “Acquisition and evaluation of long DDR2-SDRAM access sequences,” in Performance Analysis of Systems and Software, 2006 IEEE International Symposium on, Mar. 2006, pp. 243-250.
13. Don Anderson, Ravi Budruk, and Tom Shanley, “PCI Express System Architecture,” Published by MindShare Inc., ISBN: 0-321-15630-7, May 2007, pp. 2-92.
14. I. Soban&;#769;ski and W. Sakowski, “Hardware/software co-design in USB 3.0 mass storage application,” in Signals and Electronic Systems (ICSES), 2010 International Conference on, Sept. 2010, pp. 343-346.
15. Hsin-Wen Wang, Hung-Wen Lu, and Chau-Chin Su, “A Self-Calibrate All-Digital 3Gbps SATA Driver Design,” in Asian Solid-State Circuits Conference, 2005, Nov. 2005, pp. 57-60.
16. National Semiconductor, “Power Design Seminar Collection 2007,” in NS High-Performance Analog Seminar 2007, Aug. 2007, pp. 7.2-7.26.

QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
系統版面圖檔 系統版面圖檔