本論文研製之低雜訊放大器（Low Noise Amplifier ， LNA）電路利用台灣積體電路製造公司(TSMC)之0.18-μm CMOS製程技術實作完成，並於國家晶片中心(CIC)進行實際量測驗證效能。

本論文下線晶片是針對無線通訊系統前端的低雜訊放大器（Low noise amplifier），設計其工作頻帶在3.1GHz-12GHz(UWB)及3.1-10.6GHz之兩個LNA。

第一顆UWB LNA，採用LC網路作為輸入匹配，第二級使用電流再利用技術及基體偏壓技術，電流再利用主要為了提供較高的增益、增加隔絕度以及穩定度與消去共源極放大器的米勒效應，使高頻增益級足以提供在較高頻帶的增益；而基體偏壓技術，在相同的增益下，可降低功率消耗，量測結果，頻段為3.1 - 10.6GHz，電路最大增益達14.8 dB，輸入反射損耗小於-11.5與輸出小於-10.7dB，最低雜訊指數3.5dB，IIP3為-13dBm，供應電壓為1.1V，整體功率消耗為7.8mW。

第二顆UWB LNA，使用LC網路與源極退化電感作為輸入匹配，源極退化電感可提供良好的寬頻輸入匹配。第二級使用電流再利用技術，目的為提高增益、增加隔離度以及提升穩定度。量測結果，頻段為3.1 - 12GHz，電路最大增益為12.4dB，輸入反射損耗全頻段小於-15dB，輸出反射損耗小於-13.7dB，最低雜訊為3.41dB，IIP3為-12.8dBm，供應電壓為1.1V，整體功率消耗為11.2mW。

This thesis presents the research and implement on low noise amplifier for wireless communication system. The chip was fabricated by TSMC commercial 0.18-μm 1P6M CMOS technology. The efficiency of the circuit was demonstrated by measurement at National Chip Implementation Center (CIC).

The first chip, as using an LC matching network for the input matching. The second stage using Current-Reused Technique and Body-Bias to provide high gain, to increase isolation and stability and also eliminate the Miller effect of the common source amplifier, the high frequency gain stage effectively provide gain. Body bias can reduce power consumption with the same voltage gain. The maximum gain is 14.8 dB, input return loss is less than 11.5dB and the output is less than -10.7dB and minimum noise figure is about 3.5dB, the overall circuit power consumption is 7.8mW.

The second chip, as using an LC matching network and inductive source degeneration for input matching. The second stage using Current-Reused Technique to provide high gain increase isolation and stability. The maximum gain is 12.4dB, input return loss is less than -15dB, and the output return loss is less than -13.7dB, minimum noise figure is about 3.41dB, the overall circuit power consumption is 11.2mW.

中文摘要 ---------------------------------------------- i
英文摘要 ---------------------------------------------- ii
誌謝 ---------------------------------------------- iii
目錄 ---------------------------------------------- iv
表目錄 ---------------------------------------------- vi
圖目錄 ---------------------------------------------- vii

一、 緒論------------------------------------------ 1
1-1 研究背景-------------------------------------- 1
1-2 研究動機-------------------------------------- 2
1-3 論文組織-------------------------------------- 2
二、 低雜訊放大器---------------------------------- 3
2-1 UWB發展背景概述----------------------------- 3
2-2 阻抗匹配--------------------------------------- 5
2-2-1 阻抗匹配電路類型---------------------------6
2-3 品質因素探討----------------------------------- 8
2-3-1 分佈式放大器電路架構----------------9
2-3-2 LC網路加上源極退化電感----------------------10
2-3-3 並聯回授架構------------------------------ 11
2-3-4 共閘極寬頻架構-----------------------------13
2-3-5 各個架構之FOM比較--------------------------14
2-4 低雜訊放大器概述------------------------------- 15
2-5 雜訊------------------------------------------- 16
2-5-1 熱雜訊---------------------------------------- 17
2-5-2 散彈雜訊-------------------------------------- 18
2-5-3 閃爍雜訊---------------------------------18
2-5-4 電晶體雜訊--------------------------------20
2-5-4-1 通道熱雜訊------------------------21
2-5-4-2 感應閘極雜訊---------------------- 21
2-5-4-3 顫抖雜訊--------------------------22
2-6 散射參數--------------------------------------- 23
2-7 TSMC0.18μm 1P6M CMOS製程元件介紹------------ 24
2-7-1 MIM電容----------------------------------24
2-7-2 電阻-------------------------------------25
2-7-3 電感-------------------------------------25
2-7-4 CMOS電晶體高頻寄生電容----------------------26
三、 高增益超寬頻低雜訊放大器採用電流再利用與基體偏壓技術 27
3-1 電路架構簡介----------------------------------- 27
3-1-1 輸入匹配網路------------------------------ 28
3-1-2 電流再利用技術-----------------------------31
3-1-3 基體偏壓技術------------------------------34
3-1-4 輸出緩衝級--------------------------------37
3-2 FOM比較---------------------------------------- 39
3-3 電路設計與考量--------------------------------- 41
3-4 設計流程--------------------------------------- 42
3-5 電路佈局考量與模擬結果------------------------- 44
3-5-1 電路佈局考量------------------------------ 44
3-5-2 模擬結果----------------------------------45
3-6 量測結果--------------------------------------- 51
3-6-1 S參數特性---------------------------------52
3-6-2 雜訊指數特性-------------------------------54
3-6-3 非線性度特性-------------------------------55
3-7 結論------------------------------------------- 55
四、 使用電流再利用架構設計3-12GHz超寬頻低雜訊放大器 --------57
4-1 電電路架構簡介-------------------------------------57
4-1-1 輸入匹配網路------------------------------ 58
4-1-2 電流再利用架構-----------------------------60
4-1-3 輸出緩衝級---------------------------------60
4-2 FOM比較--------------------------------------- 66
4-3 電路設計與考量--------------------------------- 66
4-4 設計流程--------------------------------------- 68
4-5 電路佈局與模擬--------------------------------- 70
4-5-1 模擬結果----------------------------------71
4-6 量測結果--------------------------------------- 78
4-6-1 S參數特性---------------------------------79
4-6-2 雜訊指數和非線性特性-------------------------81
4-7 結論------------------------------------------- 84
五、 結果與討論------------------------------------- 85
5-1 高增益的超寬頻低雜訊放大器採用電流再利用與順向基底偏壓技術--85
5-2 使用電流再利用架構設計3-12GHz超寬頻低雜訊放大器---------87
六、 未來展望--------------------------------------- 90
參考文獻 ----------------------------------------------- 92
口試委員提問 ----------------------------------------96
簡介 ----------------------------------------------- 109

[1] 2006年5月8日，經濟日報 - 超寬頻問世 數位家庭邁向無線時代。
[2] G. R. Aiello and G. D. Rogerson, "Ultra-wideband wireless systems," IEEE
　　　Microwave Mag., vol. 4, pp. 36-47, Feb. 2003. 　　　　　　　　　　　　　　　　
[3] M. P. Wylie-Green, P. A. Ranta, and J. Salokannel, 2005 ,“Multi-band OFDM
UWB solution for IEEE 802.15.3a WPANs,” IEEE/Sarnoff Symposium on
Advances in Wired and Wireless Communication, pp.102-105, April.
[4] K. Siwiak and D. McKeown, "Ultra-wideband Radio Technology," 2004.
[5] 許源佳，「5.2GHz無線區域網路CMOS低雜訊放大器之設計」，國立暨南國
　際大學電機工程學系碩士論文，中華民國九十二年六月七日。
[6] 呂學士編譯，本城何彥原著，「微波通訊半導體電路」，全華科技股份有限公
司， 2001。
[7] Nien-Tsu Hsu, " Design and Analysis of Low Noise Amplifier Exploiting
Noise Cancellation," 國立中山大學電機工程研究所, 碩士論文, 2008.7.
[8] Y. Tsividis, Operation and Modeling of the MOS Transistor, 2nd ed.
McGraw-Hill, 1999.
[9] J-Y Hu, Y-L Zhu, H Wu, “An Ultra-Wideband Resistive-Feedback Low-Noise
Amplifier with Noise Cancellation in 0.18μm Digital CMOS,”IEEE Topical
Meeting on Silicon Monolithic Integrated Circuits in Systems (SiRF),
pp.251-254, Sept. 2008.
[10] Yi-Jing Lin et al., “A 3.1-10.6 GHz Ultra-Wideband CMOS Low Noise
Amplifier With Current-Reused Technique,”IEEE Mircowave and Wireless
Components Letters, Vol.17, NO.3, pp. 1683-1692, Aug. 2006
[11] Ruey-Lue Wang et al., “A 0.18-μm CMOS UWB Low Noise Amplifier for
Full-Band (3.1-10.6 GHz) Application,”IEEE Asia Pacific Conf. on Circuits
and Systems (APCCAS), pp.363-366, Dec, 2006.
[12] R-C Liu, K-L Deng, and H Wang, “A 0.6-22 GHz Broadband CMOS
Distributed Amplifier,”in Dig. IEEE Radio Freq, Integrated Circuits
Symposium, pp . 103-106, Jun. 2003.
[13] Peng Wang, Fredrik Jonsson, Dian Zhou, and Li-Rong Zheng “Low Noise
Amplifier Architecture Analysis for UWB System,”System-on-Chip, 2008.
SOC 2008. International Symposium on, pp. 1-4, Nov, 2008.
[14] Gramegna, G.; Erratico, G., "A Sub-1-dB NF+2.3-kV ESD-Protected 900-MHz
CMOS LNA, " IEEE J. Solid-State Circuit, vol. 36, Issue. 7, pp. 1010-1017,
Jul. 2001
[15] H. Meng-Ting and H. Shih-Yu, "A low power CMOS LNA for 1-10GHz
Application," IEEE Asia-Pacific Microwave Conference, 2009. APMC 2009.,
pp. 1132-1135, 2009.
[16] Hiu-Fai Leung, H. C. Luong, " A 1.2-6.6GHz LNA using Transformer
Feedback for Wideband Input matching and Noise Cancellation in 0.13μm
CMOS." Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE,
pp. 17-20, Jun. 2012.
[17] 黃振洋，「應用於無線區域網路與寬頻帶系統之低雜訊放大器設計」，國立
中央大學電機工程研究所碩士論文，中華民國九十四年六月。
[18] R. G. Arnold, C. C. Faulkner and D. J. Pedder, “Silicon MCM-D Technology
for RF Integration,” IEEE Multichip Module Conference, p340~p344, 1997.
[19] Giuseppina Sapone, Giuseppe Palmisano, " A 3-10-GHz Low-Power CMOS
Low=Noise Amplifier for Ultra-Wideband Communication," Microwave
Theory and Techniques, IEEE Transactions on, Vol. 59, Issue. 3, pp.678-
686, Mar.2011.
[20] Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic, "Digital Integrated
Circuits A Design Perspective" , Sep, 2010.
[21] S. Shekhar, X. Li, and D. J. Allstot, “A CMOS 3.1–10.6 GHz UWB LNA
Employing Stagger-Compensated Series Peaking,” in Proc. Eur. Solid-State
Circuits Conf.,pp.1-4, Jun. 4, 2006.
[22] Zhongqian; Lu Huang, “Design of Common Gate UWB LNA in CMOS,”
IEEE 8th International Conference on ASIC, 2009. ASICON ''09,
pp.1201-1204, Oct.2009.
[23] C. F. Liao and S. I. Liu, “A Broadband Noise-Canceling CMOS LNA for
3.1–10.6-GHz UWB Receiver,” in Proc. IEEE 2005 Custom Integer. Circuits
Conf., Sep. 2005, pp. 161–164.
[24] C.-W. Kim, M.-S. Kang, P. T. Anh, H.-T. Kim, and S.-G. Lee, “An Ultra
Wideband CMOS Low Noise Amplifier for 3–5-GHz UWB System,” IEEE
Journal of Solid-State Circuits, vol. 40, pp. 544 - 547, Feb. 2005.
[25] Yi-Jing Lin,Hsu, S.S.H.,Jun-De Jin,Chan C.Y.,”A 3.1–10.6 GHz
Ultra-Wideband CMOS Low Noise Amplifier With Current-Reused
Technique,” IEEE Microwave and Wireless Components Letters, vol. 17, no.3,
March 2007.
[26] Zhe-Yang Huang, Che-Cheng Huang, Yeh-Tai Hung and Meng-Ping Chen, “A
CMOS Current Reused Low-noise Amplifier for Ultra-Wideband Wireless
Receiver,” Microwave and Millimeter Wave Technology, 2008, ICMMT
International Conference, vol:3, pp.1499-1502, April 2008.
[27] C. W. Chang and Z. M. Lin ,” A 2-11 GHz Fully-Integrated Low Noise
Amplifier for WiMAX Systems,” Electron Devices and Solid-State Circuits,
pp.441-444, Dec.2007.
[28] Haolu Xiel, Xin Wang, Albert Wang, Zhihua Wang, Chun Zhang and Bin Zhao,
“A Fully-Integrated Low-Power 3.1-10.6GHz UWB LNA in 0.18um CMOS,”
pp.197-200, Jan.2007.
[29] Yo-Sheng Lin, Chang-Zhi Chen, Chi-Chen Chen, “Analysis and Design of a
CMOS UWB LNA With Dual-RLC-Branch Wideband Input Matching
Network,”Microwave Theory and Techniques, IEEE Transactions on, pp.
287-296, Feb. 2010.
[30] T. H. Lee., The Design of CMOS Radio-Frequency Integrated Circuit:
Cambridge University Press, 1998.
[31] Behzad Razavi, RF Microelectronics, Prentice Hall, 1998
[32] K. Chang, I. Bahl and V. nair, “RF and Microwave Circuit and Component
Design for Wireless System,” A John Wiley &; Sons, INC. 2002.
[33] Chang-Tsung Fu, Chien-Nan Kuo, “3~11-GHz CMOS UWB LNA Using
Dual Feedback for Broadband Matching,”IEEE Radio Frequency Integrated
Circuits. (RFIC) Symposium, 2006 Publication Date: 11-13, June,2006.
[34] Guillermo Gonzalez, Microwave Transistor Amplifiers Analysis and Design,
Prentice Hall Upper Saddle River, New Jersey, 1997
[35] K. H. Chen, J. H. Lu, B. J. Chen and S. I. Liu, "An Ultra-Wide-Band
0.4-10-GHz LNA in 0.18-um CMOS," IEEE Trans. on Circuits and Systems- II,
vol. 54, pp. 217-221, Mar. 2007.
[36] D. M. Pozar, Microwave Engineering, 2nd Edition, John Willey &; Sons,
1998. Chang-Wan Kim; Jeongseon Lee; Sang-Gug Lee, “Design of Full Band UWB
Common-Gate LNA,” Microwave and Wireless Components Letters, IEEE,
vol.17, Issue:10, pp.721-723, Oct. 2007
[37] Bo-Yang Chang, C. F Jou, "Design of a 3.1-10.6GHz Low Voltage Low Power
CMOS Low Noise Amplifier for Ultra-widebamd Receivers," Mircowave
conference Proceedings, vol.2, pp.4-7, Dec. 2005.
[38] K. H. Chen, J. H. Lu, B. J. Chen and S. I. Liu, " An Ultra-wideband 0.4-
10 GHz LNA in 0.18-um CMOS," IEEE Trans. on Circuit and Systems- II,
vol.54, pp. 217-221, Mar. 2007.
[39] L. Qiang-Tao and M. Jun-Fa, " A 0.5-11 GHz CMOS Low Noise Amplifier using
Dual-channel Shunt Technique," IEEE Mircrowave and Wireless Components
Letters, vol. 20, pp. 280-282, 2010.
[40] H. Meng-Ting and W. Kun-Long, " Design of UWB Low Power Low Noise
Amplifier with Body Bias Technique," IEEE Asia-Pacific Microwave
Conference 2011, pp. 1139-1142, 2011.
[41] Yo-Sheng Lin, Chang-Zhi Chen, and Hong-Yu Yang, " Analysis and Design of
a CMOS UWB LNA with Dual-RLC-Branch Wideband Input Matching Network,"
IEEE Transactions on, vol. 58, pp. 287-296, Feb. 2010.
[42] Meng-Ting Hsu, Yi-Cheng Chang, Yu-Hwa Lin, " Design of 3-16GHz Ultra-
Wideband CMOS LNA Based on Current Reused Topology," The 2013
International Conference of Electrical and Electronics Engineering.
[43] Meng-Ting Hsu, Yu-Hsien Lin, " Study on High Gain Low Noise Amplifier For
UWB System," 國立雲林科技大學電子工程系碩士班,碩士論文, Jun. 2011.
[44] Meng-Tung Hsu, Wen-Chen Chiu, " Design of UWB Low Power Low Noise
Amplifier Based on Current-Reused Structure and Forward Body Bias
Technique," 國立雲林科技大學電子與光電工程研究所碩士班, 碩士論文, Jun. 2012.