跳到主要內容

臺灣博碩士論文加值系統

(44.200.77.92) 您好!臺灣時間:2024/02/24 15:37
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果 :::

詳目顯示

我願授權國圖
: 
twitterline
研究生:蔣岳霖
研究生(外文):Yueh-Lin Chiang
論文名稱:非揮發性記憶元件應用於類神經感知機網路
論文名稱(外文):Non-Volatile memory device apply in neural network
指導教授:鄭湘原
指導教授(外文):Erik S. Jeng
學位類別:碩士
校院名稱:中原大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2014
畢業學年度:102
語文別:英文
論文頁數:46
中文關鍵詞:類神經網路非揮發性記憶體感知器演算法經驗模型
外文關鍵詞:PerceptronArtificial Neural NetworkNon-Volatile Memory
相關次數:
  • 被引用被引用:0
  • 點閱點閱:191
  • 評分評分:
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
類神經網路(Artificial Neural Network)主要是探討如何模擬應用人類大腦運作的方式,目前已廣泛的應用音頻、圖形辨識中;隨著科技日益發達,具備可攜性的硬體已經相當普遍。本論文透過 0.25um代工製程建立4x3 之NOI 非揮發性記憶元件陣列來實現類神經積體電路,利用感知機的演算法並配合IC 測試儀來進行訓練與驗證。
在本論文中,我們使用了六種圖形透過感知機網路進行學習,藉由監督式學習與目標值比較,不斷將權重進行更新直到收斂,另外將元件與電路的測試結果建立經驗模型,並嵌入至軟體中進行模擬驗證。在模擬中針對輸入、判斷電壓以及寫入抹除的時間進行比較,找出最適合此系統的參數,並討論不能收斂的原因,最後再藉由硬體訓練驗證模擬之結果,其結果顯示訓練趨勢與硬體相仿。

The artificial neural network simulates the operation of the human brain. It is applied extensively in audio processing and pattern recognition. With the advancement of technology, hardware portability is becoming indispensable nowadays. This thesis uses the 0.25um CMOS foundry technology to implement the 4x3 NOI array neural network and perceptron algorithms with an IC tester to verify and train the circuit.
In this thesis, six input patterns were used for the learning algorithm in these NOI synapses. During the training process, the output signals were supervised and compared to the target by updating NOI synapse weights until the system converges. Initially, we measured the circuit and device data to establish their empirical models and embedded them in the software to simulate the neural network. In the simulation, we discussed the input, judgment and stress time, found the best parameter for the system and discussed the reasons why some results fail to converge. Finally, we verified the simulation result through hardware training, and the results show that the simulation training trend is similar to hardware training.
Contents
中文摘要 ..................................................................... I
Abstract ............................................................................ II
Acknowledgment ............................................................ III
Contents ................................................................... IV
Figure Caption .............................................................. V
Table Caption .............................................................. VI
第一章類神經網路理論分析 ........................................................ 1
Chapter 1 Introduction to neural network system ............................. 2
1-1 Biological neuron model ................................................. 2
1-2 Introduction of the neural network system ............................... 3
1-2-1 Artificial Neuron model ............................................... 4
1-2-2 Learning of the neural network ........................................ 6
1-3 The perceptron algorithm ................................................ 7
第二章類神經積體電路架構 ........................................................ 11
Chapter 2 Hardware neural network architecture.............................. 12
2-1 NOI nMOSFET Synapse Model and Adaptive ................................. 12
2-1-1 Non-overlapped nMOSFETS Device Introduction .......................... 12
2-1-2 NOI Synapse Model .................................................... 16
2-2 The Hardware Architecture of Neural Network ............................ 17
第三章類神經積體電路辨識結果與討論 ............................................... 21
Chapter 3 The Operation Impact Factors of the Hardware Neural Network ...... 22
3-1 The simulation model of the neural network ............................. 22
3-1-1 Device and circuit model.............................................. 22
3-1-2 Non-linear parameters embedded in simulator .......................... 23
3-2 The Simulation Results and Operating Condition Optimization ............ 24
3-2-1 Input variation ...................................................... 25
3-2-2 Output judgment voltage .............................................. 27
3-3 The comparison of the hardware and software ............................ 31
3-4 Summary ................................................................ 33
第四章結果與未來展望 ............................................................................ 34
Chapter 4 Conclusion and Future Prospective ................................ 35
4-1 Conclusions ............................................................ 35
4-2 Future Prospective ..................................................... 36
Reference .................................................................. 38
個人自傳 ..................................................................... 40

Figure Caption
Figure 1-1 The structure of a typical neuron ................................ 2
Figure 1-2 The history of neural network .................................... 3
Figure 1-3 The structure of the artificial neuron ........................... 4
Figure 1-4 Hardlim Function ................................................. 5
Figure 1-5 Sigmoid Function ................................................. 6
Figure 1-6 The structure of the supervised learning ......................... 6
Figure.1-7 The structure of the unsupervised learning ....................... 7
Figure 1-8 Structure of the perceptron ...................................... 8
Figure 1-9 The classification of perceptron ................................ 10
Figure 1-10 The complex problem ............................................ 10
Figure 2-1 The architecture of the NOI device .............................. 13
Figure 2-2 The fabrication process of the NOI device ....................... 14
Figure 2-3 CHEI programming in NOI device. ................................. 14
Figure 2-4 BTBT hot hole injection in NOI device ........................... 15
Figure 2-5 The neural network model of NOI device .......................... 16
Figure 2-7 The schematic circuit of the 4x3 NOI synapse array .............. 18
Figure 2-8 The circuit output voltage VSA of the sensing amplifier ......... 19
Figure 3-1 The relationship of the Vth and current for different VG ........ 23
Figure 3-2 Empirical model creation and embedding into the Matlab simulator.. 24
Figure 3-3 Simulation of the training iterations versus input voltage variations for (a)traditional software (b) hardware ................................... 26
Figure 3-4 The iteration times for different high input levels ............. 27
Figure 3-5 Relationship between judgment voltage and training iteration .... 28
Figure 3-6 Vth for the different judgment voltages ......................... 29
Figure 3-7 (a) All of the synapse relations with weight in different program pulse widths, (b) all of the sample relations with VSA in different program pulse widths ............................................................... 30
Figure 3-8 The result of the iteration for different stress times .......... 31
Figure 3-9 Six patterns are provided for learning in the neural network .... 31
Figure 3-10 The simulation output voltage VSA trend ........................ 32
Figure 3-11 The hardware output voltage VSA trend .......................... 33

Table Caption
Table.1: The influence of three kinds of parameters in the system. ......... 24
Chapter1
[1-1]葉怡成, “類神經網路模式應用與實作”, 儒林圖書公司, 2005.
[1-2]張斐章, 張麗秋, “類神經網路導論-原理與應用”, 滄海書局, 2010.
[1-3]蘇木春, “機器學習-類神經網路、模糊系統以及基因演算法則”, 全華科技圖
書股份有限公司, 2004.
[1-4]楊正暉, “類神經網路誤差估計與活化函數之探討”, 碩士論文, 逢甲大學應
用數學系碩士班, 2012.
[1-5]翁健豪,“感知器學習演算之硬體電路實現”, 碩士論文, 中原大學電子工程
所, 2013.
[1-6]周鵬程, “類神經網路入門-活用Matlab”, 全華科技圖書股份有限公司,2004.
[1-7]葉怡成, “應用類神經網路”, 儒林圖書公司, 2002.
[1-8]Martin T.Hagan," Neural Network Design ",2002
Chapter2
[2-1]翁宇廷, “熱電洞注入對非重疊佈植記憶元件之可靠度研究”, 碩士論文, 中
原大學電子工程所, 2010.
[2-2]陳昭甫, “單邊非重疊離子佈植記憶元件介面特性與資料保存能力提升之研
究”, 碩士論文, 中原大學電子工程所, 2013.
[2-3]Learning"IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS(2005),
Vol.52, NO.5.
[2-4]Chris Diorio, Paul Hasler, Bradley A. Minch and Carver A. Mead,"A
Floating-Gate MOS Learning Array with Locally Computed Weight
Updates"Electron Devices, IEEE Transactions on (1997) , Vol44, Issue.12 .
[2-5]Maher E. Rizkalla, Richard L. Aldridge, and Harry C. Gundrum.,"VLSI Design
for a Forward Path Neuron Circuitry of a Back Propagation Neural Network",
Circuits and Systems. IEEE 39th Midwest symposium on (1996),Vol.1.
[2-6]Paul Hasler and Jeff Dugger,"An Analog Floating-Gate Node for Supervised",
Circuits and Systems I: Regular Papers, IEEE Transactions on ,Vol.52, Issue.5
39
[2-7]Holler, M. Simon Tam ; Castro, H. ; Benson, R."An electrically trainable
artificial neural network (ETANN) with 10240 'floating gate' synapses", Neural
Networks, IJCNN(1989). Vol.2 , 191-196.
[2-8]古佳琳, “陣列式表面聲波感測器在有機氣體辨識之研究”, 碩士論文, 中原
大學電子工程所, 2007.
Chapter3
[3-1]何家瑋, “熱電子注入對非重疊佈植記憶元件之資料保存能力研究”, 碩士論
文, 中原大學電子工程所, 2010.
[3-2]張智星, “MATLAB 程式設計與應用”, 清蔚科技, 2000.
[3-3]羅華強, “類神經網路-MATLAB 的應用”, 清蔚科技, 2001.
[3-4]姜志宏, “人臉辨識視覺系統之研究”, 碩士論文, 中央大學機械工程所,2005.
[3-5]柯榮煒, “應用類神經網路於字元影像之辨識”, 碩士論文, 中原大學電子工
程所,2007.
QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
無相關期刊