臺灣博碩士論文加值系統

本文延伸基於反覆線性內插(ILI2)之方法，提出一個三階多項式內插法在此稱為Iterative Linear Interpolation with Degree-3 Polynomial，簡稱ILI3。基於反覆線性內插模型，計算相鄰點間的三次與二次斜率經線性內插運算後推估回一次斜率對目標內插點之高度差。經過化簡後，ILI3為一三次方多項式，可以媲美四次方多項式的效果，但仍需要許多乘加法器，因此本文延伸出適應性ILI3 (Adaptive ILI3, AILI3)，可以達到極高的影像內插之精確度(PSNR)與結構相似度(SSIM)，同時大幅降低標準ILI3 (Standard ILI3, SILI3)所需之乘法器數量且Kernel Degree可以降成二階。以Xilinx Zynq 7020 FPGA實現結果顯示，所提出的SILI3演算法為3階，MAE與MSE效能接近四次方Lagrange內插法，需要乘法器15個、加法器80個，而AILI3為2階，PSNR與SSIM效能超越了最新的3階多項式內插法，需要乘法器10個、加法器66個。

In this thesis, we proposed an interpolation based on fuzzy gradiant model called Iterative Linear Interpolation with degree-3 polynomial hereinafter referred to as ILI3. After Simplifying the polynomial, ILI3 achieves great result in terms of Peak Signal to Noise Ratio (PSNR) and Structure SIMilarity (SSIM) when performing one dimensional and two dimensional image interpolations. The performance is close to some standard degree-4 polynomial interpolations such as degree-4 Lagrange interpolation. However, ILI3 still requires many multipliers and adders while interpolating, hence, we enhanced ILI3 to Adaptive ILI3 (AILI3). AILI3 achieves even better image precision (PSNR) and structure similarity (SSIM) than standard ILI3 (SILI3) while the kernel polynomial is reduced to quadratic which requiring less multipliers and adders. The final implementation using Xilinx Zynq 7020 FPGA shows that the performance in terms of MAE and MSE of SILI3 is close to degree-4 Lagrange interpolation requiring 15 multipliers, 80 adders, and 4 line buffers. The enhanced degree-2 AILI3 FPGA prototyping has performance PSNR 52 dB and SSIM 0.9999 in average which is much better than the latest degree-3 polynomial interpolation and requires 10 Multipliers, 66 adders, and 4 line buffers.

摘要 I
ABSTRACT II
致 謝 III
目 錄 IV
表目錄 VI
圖目錄 VIII
一. 簡介 1
1.1 動機與目的 1
1.2 研究工具與方法 1
1.3 論文架構 2
二. 文獻探討與本文特色 3
2.1 文獻探討 3
2.2 本文特色 5
三. 演算法設計原理與方法及其化簡、效能驗證 7
3.1 演算法設計原理與方法 7
3.2 一維多項式展開、化簡與比較 12
3.3 一維波形模擬驗證 15
3.4 二維多項式展開與化簡 20
3.5 二維影像內插效能驗證 25
3.6 SILI3之Convolution Kernel探討 28
3.7 AILI3之設計與一維化簡及驗證 35
3.8 AILI3的二維化簡及其特性探討 40
四. 實驗數據與分析 45
4.1 二維影像內插之實驗步驟與數據 45
4.2 全彩影像內插之實驗步驟與數據 54
4.3 數據分析 65
4.4 二維影像訊號之一維內插效能驗證 67
五. 硬體電路設計與實現 70
5.1 軟硬體開發所使用到的工具 70
5.2 硬體化設計之軟體架構介紹 71
5.3 硬體合成效能 77
六. 結論與未來展望 80
七. 參考文獻 81

[1]Chung-chi Lin, Ming-hwa Sheu, Huann-keng Chiang, Chishyan Liaw, Zeng-Chuan Wu, “The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing,” in Proc. IEEE Intl. Symp. Circuits and Systems (ISCAS), Seattle, 2008, May 18–21, pp. 480–483.
[2]C. Kim, S. M. Seong, J. A. Lee, and L. S. Kim, “Winscale: An image scaling algorithm using an area pixel model,” IEEE Trans. Circuits Syst. Video Technol., vol. 13, no. 6, pp. 549–553, Jun. 2003.
[3]P. Y. Chen, C. Y. Lien and C. P. Lu, “VLSI implementation of an edge- oriented image scaling processor,” IEEE Trans. Very Large Scale Integr. Syst., vol. 17, no. 9, pp. 1275–1284, Sep. 2009.
[4]C. C. Lin, M. H. Sheu, C. Liaw, and H. K. Chiang, “Fast first-order polynomials convolution interpolation for real-time digital image reconstruction,” IEEE Trans. Circuits Syst. Video Technol., vol. 20, no. 9 , pp. 1260–1264, Sep. 2010.
[5]Chien-Chuan Huang, Pei-Yin Chen, and Ching-Hsuan Ma, “A Novel Interpolation Chip for Real-Time Multimedia Applications,” IEEE Trans. Circuits and Syst. for Video Tech., vol. 22, no. 10, pp. 1512–1525. Oct. 2012.
[6]Shih-Lun Chen, “VLSI Implementation of an Adaptive Edge-Enhanced Image Scalar for Real-Time Multimedia Applications,” IEEE Trans. Circuits and Syst. for Video Tech., vol. 23, no. 9, pp. 1510–1522. Sep. 2013.
[7]Chao-Lieh Chen, and Chien-Hao Lai, “Iterative Linear Interpolation Based on Fuzzy Gradient Model for Low-Cost VLSI Implementation,” IEEE Trans, Very Large Scale Integration (VLSI) Syst, vol. 22, no. 9, pp. 1526-1538. July. 2014.
[8]ROBERT G. KEYS, “Cubic Convolution Interpolation for Digital Image Processing,” IEEE Trans, Acoustics, Speech, and Signal Processing., vol. 29, no. 6, pp. 1153-1160. December. 1981.
[9]Z. Wang, A. C. Bovik, H. R. Sheikh, and E. P. Simoncelli, “Image quality assessment: From error Visibility to structural similarity,” IEEE Trans, Image Process., vol. 13, no. 4, pp. 600-612, April 2004.