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研究生:吳柏毅
研究生(外文):Wu, Bo-Yi
論文名稱:基於三維虛擬基地台轉換技術之行動定位處理器設計與實作
論文名稱(外文):Design and Implementation of A Mobile Positioning Processor Based on 3D Virtual Base Station Transformation
指導教授:黃元豪黃元豪引用關係
指導教授(外文):Huang, Yuan-Hao
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:102
語文別:英文
論文頁數:98
中文關鍵詞:行動定位處理器三維虛擬基地台轉換
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自從美國聯邦通訊委員會提出行動定位技術需求之後,行動定位技術被廣泛地運
用在許多方面。本篇論文延伸二維的行動定位演算法,並且與三維虛擬基地台轉
換技術結合,提出三維行動定位演算法。演算法中的凸型最佳化問題普遍使用遞
迴式的方法來解決問題,例如:子梯度演算法,然而,遞迴式演算法最棘手的問
題是遞迴的計算之間有順序的依賴性,導致子梯度演算法的執行次數變少,進而
使得定位的精準度下降。本篇論文為此提出新的子梯度演算法,在沒有改變定位
處理器吞吐量的情況下,新的子梯度處理器可以執行較多的遞迴次數來增進定位
精準度,並且,新的子梯度處理器擁有較低的硬體複雜度,此外,新的子梯度處
理器在長時間運作下,硬體使用率趨近於100%。在本篇論文中的粒子濾波器交
替運算接收訊號功率強度,藉以提高硬體使用率為96.15%。本篇論文中針對粒
子濾波器提出功率節省的概念,並且引用文獻所提出具有休眠功能的低功率消耗
靜態隨機存取記憶體,作為粒子濾波器的粒子儲存記憶體。最後,本篇論文使用
台積電90 奈米製程實現三維行動定位處理器。
1 Introduction
1.1 Mobile Positioning
1.2 Particle Filter
1.3 Convex Optimization Problem
1.4 Research Motivation
1.5 Organization of This Thesis
2 Mobile Positioning System based on 3D Virtual Base Station Transformation
2.1 Signal Model
2.2 Particle Filter
2.3 3D Virtual Base Station Transformation
2.3.1 Non-Line of Sight Propagation
2.3.2 Convex Optimization
2.3.3 3D Virtual Base Station Transformation Algorithm
2.4 Convex Optimization
2.4.1 Weighting of Measured Distance
2.4.2 Sub-Gradient Method
2.4.3 3D Mobile Positioning Algorithm
3 Architecture of 3D Mobile Positioning Processor
3.1 Particle Filter
3.1.1 Memory Usage
3.1.2 Logarithmatic Function
3.1.3 Exponential Function
3.1.4 Reciprocal Processor
3.1.5 Architecture of Particle Filter
3.2 3D Virtual Base Station Transformation
3.3 Sub-Gradient Method
3.3.1 CORDIC Processor in Vector Mode
3.3.2 Approximative Two-Norm Processor
3.3.3 Analysis of Sub-Gradient Processor
4 ProposedModified Sub-Gradient Algorithm and Power SavingMethod
4.1 Modified Sub-Gradient Algorithm
4.2 Power Saving Method
5 Implementation of Proposed 3D Mobile Positioning Processor
5.1 Gate Level Simulation and Post-layout Simulation
5.2 Chip Layout and Specification
5.2.1 Chip Layout
5.2.2 Chip Specification
5.3 Power Analysis
6 Conclusion and Future Work
6.1 Conclusion
6.2 Future Work
6.2.1 Power Gated SRAM Circuit
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