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研究生:謝詠安
研究生(外文):Yung-An Hsieh
論文名稱:積體整合氮化鎵發光二極體與金氧半場效電晶體於光引擎應用
論文名稱(外文):Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors
指導教授:李亞儒李亞儒引用關係
指導教授(外文):Ya-Ju Lee
學位類別:碩士
校院名稱:國立臺灣師範大學
系所名稱:光電科技研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2014
畢業學年度:102
語文別:中文
論文頁數:65
中文關鍵詞:氮化鎵熱積存歐姆接觸
外文關鍵詞:gallium nitridethermal budgetohmic contact
相關次數:
  • 被引用被引用:0
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  • 下載下載:9
  • 收藏至我的研究室書目清單書目收藏:4
本論文提出一種新穎氮化鎵(gallium nitride, GaN)單晶片光電積體電路(optoelectronic integrated circuits, OEICs) 結構,其垂直整合發光二極體(light-emitting diode, LED)與金氧半場效應電晶體(metal-oxide-semiconductor field-effect transistor, MOSFET ),並應用於智慧型照明系統之上。本論文所提出之氮化鎵光電積體電路整合結構優點在於金氧半場效應電晶體是透過標準半導體製程技術,直接製作在經乾蝕刻後的LED晶片,其所裸露出的n-GaN磊晶層之上。此等效電路可視為直接與LED作串接,且無須另行磊晶成長其他電晶體結構層。相較於已發表文獻所提出之氮化鎵單晶片光電積體電路整合結構,例如將電晶體磊晶於LED結構之上,或是將LED磊晶於電晶體結構之上,我們的單晶片整合結構有效地避免在先前結構中,因磊晶材料晶格不匹配或磊晶熱積存(thermal budget)等等問題的產生。最終,我們所製作之光電積體電路結構其金氧半場效應電晶體最大輸出電流為IDS=1050 mA/mm,且其最大轉導數值為Gm=368 ms/mm。此外,雖然 p-GaN之金屬歐姆接觸電極尚未優化,我們所製作出之光電積體電路結構其發光二極體整 (λ=485nm)仍展現出極佳整流特性,伴隨稍為偏高的導通電壓(5.32V) 。最重要的是,無論於金氧半場效應電晶體之閘極調變亦或於發光二極體之注入電流驅動特性與光功率之調變能力,我們所提出之氮化鎵單晶片整合結構均呈現極佳的元件輸出特性, 證明本論文提出之新穎整合結構將可廣泛地應用於智能照明、網路傳輸及光學通訊等相關技術平台。
In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, he MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor oan LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.
In conclusion, we have demonstrated a monolithic integration of optoelectronic (LED) and electronic (MOSFET) devices in the GaN-based platform by using standard semiconductor-manufacturing technologies. The fabricated monolithically integrated LED/MOSFET device exhibits a maximum output current of IDS =1050 mA/mm and a peak transconductance of Gm=368 mS/mm. The LED exhibits a well rectifying behavior with a slightly high turn-on voltage of 5.32V, mainly due to the un-optimized condition of p-contact metal. Most importantly, the monolithically integrated LED/MOSFET device exhibits good gate controllability in the LED’s light output power, and hence is viable and highly promising for a broad range of applications.

目 錄 II
圖目錄 IV
致謝 VI
摘要 VII
ABSTRACT VIII
第一章 序論 1
1-1 前言 1
1-1-1 氮化鎵材料基本特性 3
1-1-2 氮化鎵發光二極體製程關鍵技術 4
1-1-4 GaN蝕刻技術 6
1-2 研究動機與目的 6
1-2-1 氮化鎵OEIC結構設計與驗證 6
1-2-2 智慧型晶片電路設計 9
1-2-3 元件基本工作原理 9
1-3 文獻回顧 10
第二章 實驗儀器與原理 12
2-1 化學氣相沉積 12
2-2 CVD的種類與比較 12
2-3 電漿輔助化學氣相沈積系統 13
2-4 SPUTTER 濺鍍系統 14
2-5 電漿之理論 14
2-6 磁控濺鍍原理 15
2-7 電漿耦合感應離子蝕刻機(ICP-RIE) 15
2-8 純物理性蝕刻 16
2-9 純化學反應性蝕刻 17
2-10 離子輔助蝕刻 17
2-11 HALL MEASUREMENT 22
2-12 利用霍爾效應求出樣品載子的極性、濃度及移動率。 24
2-13 TLM傳輸線理論 25
第三章 實驗步驟與設備 31
3-1 製程基本流程圖 31
3-2 製程步驟 32
3-3 TLM傳輸線理論計算 40
第四章 實驗結果與討論 42
4-1 ITO電性分析比較 42
4-2 藍光WAFER各層電性量測分析比較 42
4-3 LED L-I & I-V CURVE 44
4-4 MOSFET IDS-VDS ,IGS-VGS ,IDS-VGS & ISD-VGS CURVE 48
4-5 OEIC I-V CURVE & V-L CURVE 49
4-6 PMW(脈衝寬度調變) OEIC CIRCUIT 50
第五章 結論 52
參考文獻 54

圖目錄
圖 一.氮化鎵能帶與晶格常數對應表 3
圖 二.雙氣流MOVPE示意圖 5
圖 三.初步驗證GaN-based OEIC結構示意圖 7
圖 四.整合白光LED,MOSFET以及Photo-detector 結構示意圖 8
圖 五.氮化鎵智慧型晶片電路圖 9
圖 六.化學氣相沉積系統實體圖 13
圖 七.磁控濺鍍示意圖[8] 15
圖 八.化學性與物理性乾蝕刻機制[9] 16
圖 九.不同蝕刻氣體流量下所呈現之蝕刻結構 20
圖 十.三種蝕刻(物理,化學,離子輔助)機制示意圖[10] 21
圖 十一.霍爾量測示意圖 24
圖 十二. TLM傳輸線模型-等效電路示意圖 26
圖 十三. TLM電阻值與電極間距關係圖 30
圖 十四. n-GaN TLM示意圖 40
圖 十五.n+-InGaN TLM示意圖 40
圖 十六. n-GaN上之金屬TLM電性量測圖 41
圖 十七.n+-InGaN上之金屬TLM量測圖 41
圖 十八.ITO電性圖量測 42
圖 十九.LED電性圖及外部量子效率圖 44
圖 二十.串聯與並聯電阻於LED PN接面示意圖 44
圖 二十一.OEIC 架構簡圖 47
圖 二十二. MOSFET IDS-VDS & 漏電流曲線 48
圖 二十三. OEIC VGS & VDD 調變光輸出功率 49
圖 二十四. PMW脈衝寬度調變電路 50
表目錄
表一.不同半導體材料作為OEIC平台的比較 2
表二.各種CVD製程的優缺點比較及其應用 12
表三.測試GaN蝕刻速率 19
表四.各金屬合金於半導體材料之TLM計算 30
表五.n-GaN,n+-InGaN電性比較 41
表六.n+-InGaN(Ni/ITO=10nm/250nm)電性 42
表七.n-GaN(Ti/Al=50nm/250nm)電性 43


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