臺灣博碩士論文加值系統

本論文利用0.18 μm CMOS標準製程來實現一種改善光檢測器效率的新方式。藉由標準製程中的金屬層來設計一種稱為光柵(optical grating)的光學結構，透過此結構便能讓入射光源產生繞射現象，故光源傳播至光檢測器的路徑改變，使其能較為平均地分佈並照射入光檢測器的矽基底當中，藉此提升光檢測器的光吸收效力，改變以往文獻中”藉由改善載流子收集速度或是利用後設電路強化”之方式來提升效率。
研究的主要內容為深入談論光柵結構的設計概念及結構模擬，並分別設計出兩種光柵之結構，其吸收效能皆比無光柵結構的光檢測器提升至2.5倍~3.6倍；同時配合光檢測器的電性模擬結果，實際地下線製作實體，討論製程結構佈局上的可行性，並設計出對照組及實驗組的共四個光檢測器以待量測。

This work demonstrates a new way to improve the effectiveness of photodetectors fabricated by standard silicon process technologies. With the metal layers of the standard process,we design an optical structure called optical grating. When incident light pass through this structure,the diffraction happens. Then, the optical path to the photodetector will be changed. Incident light may be uniform distribution on the photodetectors and then propagates into the deep silicon substrate. Finally, the optical absorption characteristics of photodetectors can be improved. It’s a different method from old works which improve photodetectors by changing the way of collecting carriers or the circuit of it.

The main content is the design of the optical grating and the optical simulation of structure. We have two kinds of optical gratings and the performance of light absorption of the photodetectors with optical grating are higher than the photodetectors without optical grating about 2.5~3.6 time. Then,We combine those results with the electrical simulation of photodetector and analyze the feasibility models of structure in Standard CMOS Process. Finally, we have four photodetectors which divide into control group and experimental group. Next, we will measure them and discuss.

目錄
致謝 I
中文摘要 II
英文摘要 III
目錄 IV
圖目錄 V
表目錄 VII
第一章 緒論 1
1.1 研究動機 1
1.2 文獻探討 2
1.3 論文架構 7
第二章 光檢測器與光學光柵簡介 8
2.1光檢測器工作原理 8
2.2 光學光柵原理 13
2.3 光檢測器之製程 15
第三章 CMOS製程光檢測器設計與討論 16
3.1 光檢測器元件之架構設計與量測 16
3.2 數值運算模型 20
3.2.1 光學運算模組 20
3.2.2 半導體電性運算模組 26
3.3 元件設計模擬 29
3.3.1光檢測器光學模擬 29
3.3.2 光檢測器電性模擬 35
3.4 佈局設計 38
3.5 測量儀器架設 45
3.6 模擬方式改良與討論 47
3.7 量測結果與討論 51
第四章 結論與未來展望 55
4.1 結論 55
4.2未來展望 55
參考文獻 57

圖目錄
圖1.1 SPATIALLY MODULATED PHOTODETECTOR 3
圖1.2 APD之結構圖 3
圖1.3 光接受器電路架構圖 4
圖1.4 F.P.CHOU團隊設計的矽光檢測器剖面圖 5
圖1.5 (A)傳統方形排列矽光檢測器；(B)八方形排列矽光檢測器 5
圖1.6 UTC-PD結構示意圖；(A)傳統UTC-PD結構； (B)TUO SHI團隊的UTC-PD結構 6
圖2.1 典型PN結構的光二極體 8
圖2.2 在不同的材料下，吸收係數與波長之關係 9
圖2.3 (A)直接能隙示意圖；(B)間接能隙示意圖 10
圖2.4 簡易PIN結構的光二極體 12
圖2.5圓形亮環繞射圖形。 14
圖2.6 (A)有N道狹縫的繞射光柵。； (B)經過N道狹縫之繞射光柵所形成的繞射圖形。 14
圖3.1 整體PD元件結構設計圖 16
圖3.2 光柵結構剖面示意圖 17
圖3.3在矽材料中的POYNTING VECTOR光能量分佈圖(TE) (A)無光柵結構; (B)有光柵結構(1週期= 460 NM) 18
圖3.4 光檢測器結構示意圖 19
圖3.5 中間差分法示意圖 22
圖3.6 FDTD的空間電磁場配置圖 22
圖3.7 PML吸收邊界範圍示意圖 25
圖3.8 結構觀測線示意圖 29
圖3.9 在固定WIDTH = 230 NM下，改變週期長度時， 對光源傳輸及反射的影響圖，(A)TE WAVE (B)TM WAVE 31
圖3.10 在固定WIDTH = 280NM下，改變週期長度時， 對光源傳輸及反射的影響圖，(A)TE WAVE (B)TM WAVE。 32
圖3.11 POYNTING VECTOR DISTRIBUTION IN SI (TE WAVE) (A) M1光柵結構，PERIOD = 800 NM，WIDTH = 230 NM，GAP SPACING = 570 NM (B) M2光柵結構，PERIOD = 800 NM，WIDTH = 280 NM，GAP SPACING = 520 NM 34
圖3.12 光檢測器結構模擬圖 35
圖3.13 光強變化對光電流影響之模擬圖 36
圖3.14截止頻率圖 37
圖3.15標準CMOS製程結構簡示圖 38
圖3.16結構一的光檢測器設計俯視圖(A)無光柵結構 (B) 有光柵結構 39
圖3.17 結構一的光檢測器設計剖面圖(A)無光柵結構 (B) 有光柵結構 40
圖3.18結構二的光檢測器設計俯視圖(A)無光柵結構 (B) 有光柵結構 41
圖3.19結構二的光檢測器設計剖面圖(A)無光柵結構 (B) 有光柵結構 42
圖3.20 結構一的光檢測器佈局圖(A)無光柵結構 (B) 有光柵結構 43
圖3.21結構二的光檢測器佈局圖(A)無光柵結構 (B) 有光柵結構。 43
圖3.22 元件合併完成圖 44
圖3.23 雷射模組 46
圖3.24 量測模組 46
圖3.25 改良後的結構觀測線示意圖 47
圖3.26 在固定WIDTH = 230 NM下，改變週期長度時， 對光源傳輸及反射的影響圖，(A)TE WAVE (B)TM WAVE 49
圖3.27 在固定WIDTH = 280NM下，改變週期長度時， 對光源傳輸及反射的影響圖，(A)TE WAVE (B)TM WAVE。 50
圖3.28 光電流特性量測圖 52





表目錄
表3.1 METAL 層自訂參數表 17
表3.2 本研究實現之四種版本的光檢測器 19
表3.3 三種結構的光傳輸、反射、吸收比較表 33
表3.4 改良後的三種結構之光傳輸、反射、吸收比較表 48
表3.5 模擬結果與實際量測結果比較表 52
表3.6 文獻的光檢測器與本論文之結構效率比較表 54

[1]葉建宏, 鄒志偉, “光纖的演進及其關鍵技術應用,” 物理, vol. 32, no. 1, pp. 30-36, 2010.
[2]Fang-Ping Chou, Guan-Yu Chen, Ching-Wen Wang, Yu-Chang Liu, Wei-Kuo Huang, and Yue-Ming Hsin, “Silicon Photodiodes in Standard CMOS Technology,” IEEE Journal of Selected Topics in Quantum Electronics, vol. 17, no. 3, pp. 730–740, June 2011.
[3]M. Jutzi, M. Grozing, E. Gaugler, W. Mazioschek, and M. Berroth, “2-Gb/s CMOS Optical Integrated Receiver With a Spatially Modulated Photodetector,” IEEE Photonics Technology Letters, vol. 17, no. 6, pp. 1268–1270, June 2005.
[4]Cathleen Rooman, Daniel Coppee, and Maarten Kuijk, “Asynchronous 250 Mbit/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications,” in Proceedings of the 25th European Solid-State Circuits Conference, 1999, pp. 234–237.
[5]Tony Shuo-Chun Kao, and Anthony Chan Carusone, “A 5-Gbps opto-electrical receiver with on-chip photodetector in 0.18-μm CMOS,” in Microsystems and Nanoelectronics Research Conference, 2009, pp. 17–20.
[6]Hyo-Soon Kang, Myung-Jae Lee, and Woo-Young Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Applied Physics Letters, vol. 90, no. 15, pp. 151118-151118-3, Apr. 2007.
[7]Jin-Sung Youn, Hyo-Soon Kang, Myung-Jae Lee, Kang-Yeob Park, and Woo-Young Choi, “High-Speed CMOS Integrated Optical Receiver With an Avalanche Photodetector,” IEEE Photonics Technology Letters, vol. 21 , no. 20, pp. 1553–1555, Oct. 2009.
[8]Wei-Kuo Huang, Yu-Chang Liu, and Yue-Ming Hsin, “A High-Speed and High-Responsivity Photodiode in Standard CMOS Technology,” IEEE Photonics Technology Letters, vol. 19, no. 4, pp. 197–199, Feb. 2007.
[9]Fang-ping Chou, Ching-Wen Wang, Guan-Yu Chen, and Yue-ming Hsin, “An 8.7 GHz Si photodiode in standard 0.18-μm CMOS technology,” in 15th OptoeElectronics and Communications Conference, 2010, pp. 826-827.
[10]Tuo Shi, Bing Xiong, Changzheng Sun, and Yi Luo, “Back-to-Back UTC-PDs With High Responsivity High Saturation Current and Wide Bandwidth,” IEEE Photonics Technology Letters, vol. 25, no. 2, pp. 136-139, Jan. 2013.
[11]Tuo Sh, Bing Xiong, Changzheng Sun, and Yi Luo, “Study on the saturation characteristics of high-speed uni-traveling-carrier photodiodes based on field screening analysis,” Chinese Optics Letters, vol. 9 , no. 8, pp. 082302-1– 082302-4, 2011.
[12]Fang-Ping Chou, Ching-Wen Wang, Zi-Ying Li, Yu-Chen Hsieh, and Yue-Ming Hsin, “Effect of Deep N-Well Bias in an 850-nm Si Photodiode Fabricated Using the CMOS Process,” IEEE Photonics Technology Letters, vol. 25 , no. 7, pp. 659–662, April 2013.
[13]Berkehan Ciftcioglu, Lin Zhang, Jie Zhang, John R. Marciante, Jonathan Zuegel, Roman Sobolewski, and Hui Wu, “Integrated Silicon PIN Photodiodes Using Deep N-Well in a Standard 0.18 μm CMOS Technology,” IEEE Journal of Lightwave Technology, vol. 27 , no. 15, pp. 3303–3313, Aug. 2009.
[14]Wei-Kuo Huang, Yu-Chang Liu, and Yue-Ming Hsin, “Bandwidth enhancement in Si photodiode by eliminating slow diffusion photocarriers,” IEEE Electronics Letters, vol. 44 , no. 1, pp. 52–53, January 2008.
[15]Bo-EN Yan, “850 nm Silicon Photodetectors,” M.S. Thesis, University of NCU, Taiwan, 2008.
[16]B. Yang, J. D. Schaub, S. M. Csutak, D. L. Rogers, and J. C. Campbell, “10-Gb/s All-Silicon Optical Receiver,” IEEE Photonics Technology Letters, vol. 15, no. 5, pp. 745–747, May 2003.
[17]Myung-Jae Lee, and Woo-Young Choi, “Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P+/N-well Junctions Fabricated With Standard CMOS Technology,” OSA Journal of the Optical Society of Korea, vol. 15 , no. 1, pp. 1–3, 2011.
[18]Mohamed Atef, Andreas Polzer, and Horst Zimmermann, “Avalanche Double Photodiode in 40-nm Standard CMOS Technology,” IEEE Journal of Quantum Electronics, vol. 49 , no. 3, pp. 350–356, March 2013.
[19]Simon Sze, Semiconductor Devices Physics and Technology, John Wiley &; Sons , 2001.
[20]Safa O. Kasap, Optoelectronics and photonics : principles and practices, Prentice Hall, 2001.
[21]Kane Yee, “Numerical solution of initial boundary value problems involving maxwell''s equations in isotropic media,” IEEE Transactions on Antennas and Propagation, vol. 41, no. 3, pp. 302–307, May 1966.
[22]劉傳璽, 陳進來, CMOS元件物理與製程整合 : 理論與實務, 五南, 2006.