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研究生:林冠廷
研究生(外文):Kuan-Ting Lin
論文名稱:應用於軟體無線電之CMOS射頻前端積體電路設計
論文名稱(外文):CMOS RF Front-End Integrated Circuits for Software-Defined Radio Applications
指導教授:呂學士
指導教授(外文):Shey-Shi Lu
口試委員:孫台平孟慶宗黃國威邱弘緯陳筱青汪濤
口試委員(外文):Tai-Ping SunChin-Chun MengGuo-Wei HuangHung-Wei ChiuHsiao-Chin ChenTao Wang
口試日期:2014-06-18
學位類別:博士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2014
畢業學年度:102
語文別:英文
論文頁數:152
中文關鍵詞:互補式金屬氧化物半導體低雜訊放大器混頻器接收器發射器可調頻段寬頻
外文關鍵詞:CMOSlow noise amplifier (LNA)mixerreceiver (RX)transmitter (TX)tunable-bandwideband
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無線通訊已快速蓬勃發展,為人們帶來了便利的通訊方式,各種無線存取技術也已分別針對數據傳輸速率、傳輸範圍和機動性做最佳化設計以符合各種不同需求的應用。然而這樣的多樣性也使得無線通訊技術缺乏全球統一的頻譜分配規範,伴隨著許多不同的載波頻率、訊號頻寬、調變方式的通訊標準。最終極的解決方案是採用軟體定義無線電,它使用單一的無線電覆蓋任何通訊頻道,具備較寬的頻譜與支援任何調變機制和訊號頻寬。為了降低成本、功耗和晶片尺寸,理想上能有一個可以處理多個頻帶的收發機來達到此目標。在這篇論文中提出一套收發機架構和一些電路結構,它可以處理從800 MHz到6 GHz頻段的訊號,並使用CMOS晶片來實現應用於軟體定義無線電射頻前端積體電路。
在第二章中提出了一個寬頻可變增益驅動放大器,利用電阻式並聯回授技巧和串級架構使其可應用於軟體定義無線電。此寬頻驅動器放大器以90奈米CMOS技術來實現。在0.8到6 GHz測試結果,其功率增益大於10 dB、輸出匹配小於-10 dB、可調增益範圍從-3到18 dB、輸出三階截取點和功耗分別為5.8 dBm和10 mW。此外,也利用此寬頻可變增益驅動放大器整合一軟體定義無線電發射機前端電路。其測量結果之功率增益大於12.8 dB、輸出匹配優於-9.6 dB。輸出三階截取點大於-5.25 dBm,在0.8到6 GHz的最大值為-0.75 dBm。
在第三章中提出了一個寬頻接收機前端電路,其操作頻率為0.8到6 GHz,利用一個電阻式並聯回授低雜訊放大器和一個微混波器來實現,並以90奈米CMOS技術來製作晶片。使用電阻式並聯回授與串聯電感共振,使得低雜訊放大器在輸入匹配、功率增益和雜訊係數都能有較寬頻的特性。在低雜訊放大器之後是微混波器,進行頻率的降頻工作,並可將單端訊號轉為雙端訊號。測量結果從0.8到6 GHz其轉換增益大於17 dB和輸入返回損耗超過7.3 dB。輸入三階截取點範圍從-7到-10 dBm,雜訊指數則從4.5到5.9 dB。此寬頻接收機之晶片面積為0.48 mm2,比以往的接收機前端電路晶片面積較為縮小,總功耗為13 mW。
為了消除不想要的鄰近通道干擾,在第四章中提出一個可操作於2.1至6 GHz的可變頻率接收機前端電路使用的可變電晶體尺寸的技巧,並也90nm奈米CMOS技術來實現。藉由並聯連接電晶體尺寸可變的技術,使接收機前端提供16個不同頻段的操作選擇。在這些頻段中,該接收機之轉換增益變化範圍為19.7至23.7 dB,雜訊指數從5.3到6 dB。此可調頻率接收機之晶片面積為0.45 mm2,這比傳統採用被動式元件變頻的接收器要小的許多。

The wireless industry has enjoyed a fast pace of growth due to the true convenience it offers users. Various radio access technologies have been individually optimized by trading data rate, range, and mobility to superlatively suit target applications. However, lack of globally harmonized spectrum allocation has also added to this variety. Many communication standards with different carrier frequencies, channel bandwidths, and modulation schemes are widely used. The ultimate solution is the software-defined radio (SDR), which uses a single radio to cover any communication channel in a wide frequency spectrum with any modulation and bandwidth. In order to reduce cost, power consumption and chip size, it is desirable to have a transceiver that can handle multiple frequency bands. In this thesis, a transceiver architecture and novel circuit structures, which can handle the bands from 800 MHz to 6 GHz, are proposed to achieve a CMOS RF front-end integrated circuits for SDR applications.
A wideband variable gain driver amplifier with shunt resistive-feedback and cascade topology is proposed for SDR application. The proposed wideband driver amplifier is implemented in 90 nm CMOS technology. Measurement results show that the power gain is greater than 10 dB and output matching is better than –10 dB from 0.8 to 6 GHz. The tunable gain ranges from –3 to 18 dB. The output third-order intercept point (OIP3) and power consumption are 5.8 dBm and 10 mW, respectively. Besides, a transmitter front-end for software-defined radio is also implemented. Measurement results show that the power gain is greater than 12.8 dB and output matching is better than –9.6 dB from 0.8 to 6 GHz. The OIP3 are greater than –5.25 dBm and the maximum OIP3 is –0.75 dBm.
A wideband (0.8–6 GHz) receiver front-end (RFE) utilizing a shunt resistive feedback low-noise amplifier (LNA) and a micromixer is realized in 90nm CMOS technology for SDR applications. By using shunt resistive feedback and series inductive peaking, the proposed LNA is able to accomplish a wideband characteristic in input matching, power gain and noise figure. The LNA is followed by a micromixer, which performs frequency down-conversion and single-to-differential transition. The measurement shows a conversion gain larger than 17 dB and input return loss larger than 7.3 dB, both from 0.8 to 6 GHz. The IIP3 ranges from -7 to -10 dBm, and the noise figure from 4.5 to 5.9 dB. This wideband receiver occupies 0.48 mm2 and consumes 13 mW which is readily compact compared with the prior RFEs.
In order to eliminate the undesired adjacent channel interference in SDR frequency ranges, a 2.1 to 6 GHz tunable receiver front-end using a transistor-size scaling technique is also realized in 90nm CMOS technology. The transistor-size scaling technique is achieved by parallel connection of transistors and utilized in a receiver front-end that provides sixteen bands for selection. Depending on the band selection, the conversion gain of the receiver varies from 19.7 to 23.7 dB, and the noise figure from 5.3 to 6 dB. This tunable-band receiver occupies 0.45 mm2 in size, which is readily compact compared with the receivers that adopt switchable passive components.

Chinese Abstract .........................................i

English Abstract .......................................iii

Table of Contents ........................................v

List of Figures ........................................vii

List of Tables ...........................................x

1.Introduction ...........................................1
1.1 Motivation ...........................................1
1.2 Software-Defined Radio ...............................4
1.3 Contributions ........................................8
1.4 Dissertation Organization ............................9

2.Wideband Transmitter Front-End for Software-Defined Radio .........................................................10
2.1 Introduction ........................................11
2.2 Wideband Driver Amplifier ...........................12
2.2.1 Circuit Design of Wideband Driver Amplifier .......12
2.2.2 Measurement Results ...............................14
2.3 Gilbert Cell Mixer ..................................18
2.4 Wideband Software-Defined Radio Transmitter Front-End .........................................................28
2.5 Summary .............................................37

3.Wideband Receiver Front-End for Software-Defined Radio 38
3.1 Introduction ........................................39
3.2 Wideband Low Noise Amplifier ........................44
3.3 Micromixer ..........................................48
3.4 Wideband Software-Defined Radio Receiver Front-End ..51
3.5 Summary .............................................56

4.Tunable-Band Receiver Front-End for Software-Defined Radio .........................................................57
4.1 Introduction ........................................57
4.2 Tunable-Band Low Noise Amplifier ....................61
4.2.1 Input Return Loss and Gain of Tunable-band LNA ....62
4.2.2 Noise Characterization of Tunable-band LNA ........66
4.2.3 Measurement and Discussion ........................73
4.3 Tunable-Band Software-Defined Radio Receiver Front-End .........................................................78
4.4 Summary .............................................83

5.Conclusions ...........................................84

Reference ...............................................86

APPENDIX A: Derivation Details of The Noise Parameters ..98

APPENDIX B: Carbon Materials for EM Wave Absorption ....101
B.1 Introduction .......................................102
B.2 Experiment Setup ...................................104
B.3 Experiment Results and Discussion ..................108
B.4 Summary ............................................120

APPENDIX C: Gold Plated Carbon Nanotube Bundle Antenna .121
C.1 Introduction .......................................122
C.2 Experiment Design ..................................123
C.2.1 Growth of Gold Plated Carbon Nanotube Bundle .....123
C.2.2 Design of Voltage Control Oscillator .............124
C.2.2.1 Thermal Noise of LC-Tank .......................125
C.2.2.2 Switching Transistor Noise .....................131
C.2.2.3 Tail Current Noise .............................139
C.2.3 Integration of CNT Antenna and VCO ...............145
C.3 Measurement Results and Discussion .................147
C.4 Summary ............................................152

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