臺灣博碩士論文加值系統

本論文研究主要分兩部分，第一部分介紹一個低電壓低功耗之0.18-μm CMOS超寬頻(Ultra Wideband)低雜訊放大器(Low-Noise Amplifier)，利用RC負回授及三階Cascade串接方式創造出一個應用於超寬頻的增益放大，模擬結果增益高達25.04分貝及低雜訊係數2.9分貝。其中電晶體使用於低電壓的0.3伏特，可有效降低電晶體的電流，整體電路功耗為3.7毫瓦。
第二部分介紹一個結合帶拒濾波器之0.18-μm CMOS超寬頻低雜訊放大器，利用帶拒濾波的方式，去除掉不需要的頻段，減少不必要的訊號對接收器干擾。帶拒濾波器是採用被動式電路設計，由電感及電容串接組成。電感部分使用主動電感設計，其特性為高品質因素可達高選擇性的濾波效果，也可大幅減少因濾波段對其他頻段的影響。而電容部分所採用的是變電容設計，其特性是可藉由電壓控制方式調整其電容值大小，可作為濾波器抑制頻段微調之用。

Thesis research can be divided into two parts. The first part introduces that design of a low supply voltage, low power of 0.18-μm CMOS ultra wideband (UWB) low noise amplifier (LNA). Employing the common-source configuration with the RC negative feedback and source degeneration of three-stage cascade circuit to achieve an amplifier is applied for ultra wideband system. Simulation results about high gain of 25.04dB and low noise figure of 2.9dB. Moreover, the transistor works in low supply voltage of 0.3V that it can reduce the drain current to achieve the low DC power consumption of 3.7mW.
The second part introduce the design of 0.18-μm CMOS UWB LNA with notch filter to reject the specific bandwidth while you not need, and it can reduce the signal interference of the transceiver. Then, design of the notch filter implemented by the passive circuit with the inductor and the capacitor series. The inductance is replaced by active inductor, and characteristic of active inductor is high quality factor to achieve a highly selective passive band reject filter. The capacitance is replaced by varactor, and characteristic of varactor can change the capacitance by voltage to achieve the notch filter of the rejection frequency adjusted.

摘　要 i
ABSTRACT ii
誌謝 iii
CONTENTS iv
LIST OF TABLES vi
LIST OF FIGURES vii
CHAPTER 1 INTRODUCTION 1
1.1 Background and Motivation 1
1.2 Thesis Structure 2
CHAPTER 2 BASICS OF RADIO FREQUENCY INTEGRATED CIRCUIT DESIGN 3
2.1 LNA Analysis 3
2.2 S-Parameter 3
2.3 Noise Figure 5
2.4 Linearity 7
2.5 The Gain of 1dB Compression Point 7
2.6 Third-order Intercept Point 8
2.7 Stability 10
2.8 Figure of Merit 12
CHAPTER 3 DESIGN OF ULTRA WIDEBAND LOW NOISE AMPLIFIER 13
3.1 Review of the LNA Architectures 13
3.2 Proposed of the LNA Circuits Analysis 14
3.3 Simulation of Results 20
3.4 Conclusion 25
CHAPTER 4 DESIGN OF THE UWB LNA WITH NOTCH FILTER 26
4.1 LC Resonant Circuit 26
4.2 Characteristics of Varactor 28
4.2.1 Analog Tuning Varactor 28
4.3 Characteristics of Active Inductor 31
4.3.1 Basics of Gyrator 31
4.3.2 Active Inductor Circuit 33
4.3.3 Simulated Results of Active Inductor 34
4.4 Proposed of Notch Filter 35
4.5 UWB LNA with Proposed Notch Filter 37
4.6 Simulation of Results 37
4.7 Comparison Table 43
4.8 Measurement of Results 45
4.9 Comparison Table 49
4.10 Conclusion 51
CHAPTER 5 CONCLUSIONS 52
REFERENCES 54

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