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研究生:邱景群
研究生(外文):Ching-Chun Chiu
論文名稱:考慮溫度相依之多核心系統晶片測試排程
論文名稱(外文):Temperature-Dependent Test Scheduling for Core-Based System-on-Chip Design
指導教授:黃世旭黃世旭引用關係
指導教授(外文):Shih-Hsu Huang
學位類別:碩士
校院名稱:中原大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2015
畢業學年度:103
語文別:中文
論文頁數:54
中文關鍵詞:測試排程溫度相依缺陷TAM Bus位元分配
外文關鍵詞:Test SchedulingTemperature-Dependent defectTAM Bus Assignment
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在系統晶片上,溫度對測試的影響越來越受到關注,特別是對於不同的測試應該在不同的溫度範圍內執行。測試經由TAM Bus連接至外部測試機台(ATE),但是TAM Bus同一時間能執行的核心有限,因為受到位元(width)的限制,所以如何適當的分配TAM Bus位元對於測試排程的總時間長度有很大的影響,然而之前對於溫度相依的測試研究文獻較忽略TAM Bus位元分配的重要性。
基於上述觀察,我們提出一個兩階段式演算法,第一階段為TAM Bus位元分配,第二階段為溫度相依的測試排程。經由兩階段式的演算法可以達到位元的最佳利用,避免空乏時間的浪費,並且考慮測試溫度,利用升溫排程及降溫排程,讓所有的測試都在指定的溫度範圍內執行。經由結合TAM Bus位元分配及溫度相依的測試排程,可以達到最小化總測試時間長度並提高測試效率降低成本的目標。


Recent research has shown that temperature-dependent testing, which applies different tests at different temperature ranges, is needed for system-on-chip (SoC) designs. However, previous temperature-dependent testing algorithms assume that two external tests cannot utilize the test-access mechanism (TAM) at the same time. In fact, if the external tests of different cores do not use the same TAM bus wire, they can be executed concurrently for reducing the test application time. Based on this observation, in this paper, we propose an effective and efficient algorithm to perform the simultaneous application of test scheduling and TAM bus wire assignment for temperature-dependent SoC testing. Compared with previous algorithms, experimental results consistently show that the proposed approach can greatly reduce the total test application time.

中文摘要 I
Abstract II
誌謝 III
目錄 IV
圖目錄 V
表目錄 VI
第一章 緒論 1
1.1 研究目的 3
1.2 研究動機 4
1.3 全文架構 11
第二章 溫度相依測試排程的基本概念 12
2.1 測試排程的基本架構 13
2.2 溫度相依測試的基本概念 16
第三章 同時考慮TAM Bus分配及溫度相依之測試排程 19
3.1 TAM Bus位元分配 20
3.2 溫度相依之測試排程 30
第四章 實驗結果與分析 34
4.1 工作平台及實驗流程 34
4.2 實驗結果與數據分析 37
第五章 結論 42
參考文獻 43


圖目錄
圖 1.1 : TAM width 分配範例一 6
圖 1.2 : TAM width 分配範例二6
圖 1.3 : TAM width 分配結果範例一的測試排程圖8
圖 1.4 : TAM width 分配結果範例二的測試排程圖 9
圖 1.5 : 範例一以測試長度為權重之測試排程結果10
圖 2.1 : 系統架構圖14
圖 3.1 : 測試示意圖 20
圖 3.2 : 文獻[2]的 TAM Bus 分配結果22
圖 3.3 : 第一階段演算法 pseudo code24
圖 3.4、TAM width 分配演算法流程—1 24
圖 3.5 : TAM width 分配演算法流程—2 26
圖 3.6 : TAM width 分配演算法流程—3 26
圖 3.7 : TAM width 分配演算法流程—4 27
圖 3.8 : TAM width 分配演算法流程—5 28
圖 3.9 : TAM width 分配演算法流程—6 29
圖 3.10 : 第二階段演算法 pseudo code 32
圖 3.11 : 經 TAM Bus 分配的溫度相依之測試排程 32
圖 3.12 : 文獻[2]的測試排程結果 33
圖 4.1 : 實驗流程圖 35
圖 4.2 : Case1 floorplan 39
圖 4.3 : Case1 測試排程示意圖 39
圖 4.4 : Core A 溫度變化曲線圖 40
圖 4.5 : Core C 溫度變化曲線圖41


表目錄
表 1.1 : 功能核心資訊 5
表 1.2 : 核心與測試的詳細資訊7
表 3.1 : 核心與測試資訊30
表 4.1 : 溫度相依測試排程實驗結果 37
表 4.2 : Case1 核心與測試的詳細資訊 38


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