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[1]許明哲, “先進微電子3D-IC構裝,” 五南圖書出版社, 2011 [2]C. Qinghu, S. Xin, Z. Yunhui, M. Shenglin, C. Jing, M. Min, et al., “Design and optimization of redistribution layer (RDL) on TSV interposer for high frequency applications, ” in Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2011 12th International Conference , pp.1-5, 2011 [3]N.C. Lee, “Getting Ready for Lead-free Solder,” Soldering & Surface Mount Technology, vol. 9, pp. 65-69, 1997 [4]M. Abtew and G. Selvaduray, “Lead-free Solders in Microelectronics,” Materials Science and Engineering R-reports, vol.27, pp.95-141, 2000 [5]S. Choi, J. Lee, F. Guo, T. Bieler, K. Subramanian, and J. Lucas, “Creep Properties of Sn-Ag solder Joints Containing Intermetallic Particles,” Journal of the Minerals Metals and Materials Society, vol.53,pp.22-26 , 2001 [6]S. Kim and J. Yu, “Effects of Ag on the Kirkendall void formation of Sn-xAg/Cu solder joints,” Journal of Applied Physics, vol. 108, pp.083532, 2010 [7]W. Yang, R. W. Messler, and L. E. Felton, “Microstructure Evolution of Eutectic Sn-Ag Solder Joints,” Journal of Electronic Materials, vol.23, pp.765-772, 1994 [8]K. Kim, S. Huh, and K. Suganuma,“Effect of Cooling Speed on Microstructure and Tensile Properties of Sn-Ag-Cu Alloys,”Materials Science and Engineering A, vol.333, pp.106-114, 2002 [9]K. Suganuma, S.-H. Huh, K. Kim, H. Nakase, and Y. Nakamura, “Innovative Solidification Processing for Advanced materials. Effect of Ag Content on Properties of Sn-Ag Binary Alloy Solder,”Materials transactions, vol. 42, pp. 286-291, 2001 [10]K.Suganuma,“Interface Phenomena in Lead-free Soldering,” Environmentally Conscious Design and Inverse Manufacturing, 1999. Proceedings. EcoDesign''99: First International Symposium, pp.620-625, 1999 [11]S. Choi, J.G. Lee, F. Guo, T.R. Bieler, K. N. Subramanian, and J. P. Lucas, “Creep Properties of Sn-Ag Solder Joints Containing Intermetallic Particles,” Journal of the Minerals Metals and Materials Society, vol.53, pp.22-26, 2001 [12]J. Parent, D. Chung, and I. Bernstein,“Effects of Intermetallic Formation at the Interface between Copper and Lead-Tin Solder,” Journal of Materials Science, vol.23, pp.2564-2572, 1988 [13]P.G. Harris and K.S. Chaggar, “The Role of Intermetallic Compounds in Lead-Free Soldering,” Soldering and Surface Mount Technology, vol.10, pp.33-38, 1998 [14]T. An and F. Qin, “Cracking of the Intermetallic Compound Layer in Solder Joints Under Drop Impact Loading,” Journal of Electronic Packaging, vol.133, pp. 031004, 2011 [15]C. Yu, Y. Yang, J. Chen, J. Xu, J. Chen, and H. Lu, “Effect of deposit thickness during electroplating on Kirkendall voiding at Sn/Cu joints,” Materials Letters, vol. 128, pp. 9-11, 2014 [16]M. M. Arshad, A. Jalar, and I. Ahmad, “Characterization of parasitic residual deposition on passivation layer in electroless nickel immersion gold process,” Microelectronics Reliability, vol. 47, pp. 1120-1126, 2007 [17]Y. T. He, H. P. Li, R. Shi, F. Li, G. Zhang, and L. Ernst, “Passivation Cracking Analyses of Micro-structures of IC Packages,” Key Engineering Materials , vol. 324-325 , pp. 515-518, 2006 [18]R. van Silfhout, W. van Driel, Y. Li, M. van Gils, J. Janssen, G. Zhang, et al., “Effect of Metal Layout Design on Passivation Crack Occurrence using both Experimental and Simulation Techniques,” Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, pp.69-74, 2004 [19]Y. He, H. Li, F. Li, L. Wang, G. Zhang, and L. Ernst, “Effects of Aeronautical Conditions on Passivation Cracking of Micro-Structures of IC Packages,” Thermal Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, pp. 1-4, 2006 [20]Y. He, H. Li, F. Li, R. Shi, G. Zhang, and L. Ernst, “Passivation Cracking Analyses of ICs for Different Fixing Position under the Aeronautical Working Conditions,” Electronic Packaging Technology, 2006. ICEPT ''06. 7th International Conference, pp. 1-5, 2006 [21]X. Zhang, “Discussions on the Failure Mode and Criterion of Passivation Cracks,” Electronics Manufacturing and Technology, 31st International Conference, pp. 248-252, 2006 [22]B. A. Zahn, “Comprehensive Solder Fatigue and Thermal Characterization of a Silicon Based Multi-Chip Module Package Utilizing Finite Element Analysis Methodologies,” Proceedings of the 9th International ANSYS Conference and Exhibition, pp. 1-15, 2000 [23]S. F. Al-Sarawi, D. Abbott, and P. D. Franzon, “A Review of 3-D Packaging Technology,” IEEE transactions on components, packaging, and manufacturing technology-part B, vol. 21, pp. 2-14, 1998 [24]R. S. Patti, “Three-Dimensional Integrated Circuits and the Future of System-on-Chip Designs,” Proceedings of the Institute of Electrical and Electronic Engineers, vol. 94, pp. 1214-1224, 2006 [25]A. T. Huang, A. Gusak, K. Tu, and Y.-S. Lai, “Thermomigration in SnPb composite flip chip solder joints,” Applied Physical Letters, vol.88, pp.141911, 2006 [26]H. Ye, C. Basaran, and D. Hopkins, “Thermomigration in Pb-Sn solder joints under joule heating during electric current stressing,” Applied Physical Letters, vol. 82, pp. 1045-1047, 2003 [27]H.Y. Hsiao and C. Chen, “Thermomigration in Pb-Free SnAg Solder Joint Under Alternating Current Stressing,” Applied Physical Letters, vol.94, pp. 092107, 2009 [28]H.Y. Chen, C. Chen, and K. N. Tu, “Failure induced by thermomigration of interstitial Cu in Pb-free flip chip solder joints,” Applied Physical Letters, vol. 93, pp. 122103-122105, 2008 [29]H. Y. Chen, H. W. Lin, C. M. Liu, Y. W. Chang, A. T. Huang, and C. Chen, “Thermomigration of Ti in flip-chip solder joints,” Scripta Materialia, vol.66, pp. 694-697, 2012 [30]H. Y. Chen and C. Chen, “Thermomigration of Cu-Sn and Ni-Sn intermetallic compounds during electromigration in Pb-free SnAg solder joints,” Journal of Materials Research, vol. 26, pp. 983-991, 2011 [31]T. Miyazaki and T. Omata, “Electromigration degradation mechanism for Pb-free flip-chip micro solder bumps,” Microelectronics Reliability, vol.46, pp. 1898-1903, 2006 [32]Y. Wang, K. H. Lu, J. Im, and P. S. Ho, “Reliability of Cu pillar bumps for flip-chip packages with ultra low-k dielectrics,” Electronic Components and Technology Conference, pp.1404-1410, 2010 [33]A. L. X. Jiang, L. C. Ming, J. C. Y. Gao, and T. K. Hwee, “Pillar Bump Technology and Integrated Embedded Passive Devices,” Electronic Packaging Technology, 2006. ICEPT ''06. 7th International Conference, pp.1-5, 2006 [34]T. Sakurai, “Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs,” Electron Devices, IEEE Transactions, vol.40, pp.118-124, 1993. [35]Z. Wang, J. Wang, S. Lee, S. Yao, R. Han, and Y. Q. Su, “300-mm Low-k Wafer Dicing Saw Development,” Electronics Packaging Manufacturing, IEEE Transactions, vol. 30, pp. 313-319, 2007 [36]C. J. Uchibori, X. Zhang, P. S. Ho, and T. Nakamura, “Chip Package Interaction and mechanical reliability impact on Cu/ultra low-k interconnects in Flip Chip package,” Solid-State and Integrated-Circuit Technology, pp.1219-1222, 2008 [37]P.H. Tsao, B. Kiang, K. Wu, A. Chang, and T.D. Yuan, “Low-K Flip Chip Board Level Reliability on 65nm Technology,” Electronic Components and Technology Conference, pp.110-115, 2007 [38]M. W. Lee, J. Y. Kim, J. D. Kim, and C. H. Lee, “Below 45nm low-k layer stress minimization guide for high-performance flip-chip packages with copper pillar bumping,” Electronic Components and Technology Conference, pp.1623-1630, 2010 [39]K. Chen and T. Lin, “Copper pillar bump design optimization for lead free flip-chip packaging,” Journal of Materials Science: Materials in Electronics, vol. 21, pp. 278-284, 2010 [40]R. W. Clough, “The finite element method in plane stress analysis,” American Society of Civil Engineers, PA, pp. 345-378, 1960 [41]M.J. Turner, E.H. Dill, H.C. Martin and R.J. Melosh, “Large Deflections of Structures Subjected to Heating and External Loads,” Journal of the Aerospace Sciences, vol. 27, pp. 97-106, 1960 [42]R.H. Gallagher, “Stress Analysis of Heated Complex Shapes,” Journal of the American Rocket Society, vol. 32, pp. 700-707, 1962 [43]劉晉奇, 褚晴暉, “有限元素分析與ANSYS的工程應用,” 滄海書局, 2005 [44]B. Zhao, “Thermal stress analysis of ceramic-coated diesel engine pistons based on the wavelet finite-element method,” Journal of Engineering Mechanics, vol. 138, pp. 143-149, 2011 [45]V. Chawla, R. Jayaganthan, and R. Chandra, “Analysis of thermal stress in magnetron sputtered TiN coating by finite element method,” Materials Chemistry and Physics, vol. 114, pp. 290-294, 2009 [46]C. S. Zhang, R. Kallam, A. Deceuster, A. Dasu, and L. Li, “A thermal-mechanical coupled finite element model with experimental temperature verification for vertically stacked FPGAs,” Microelectronic Engineering, vol. 91, pp. 24-32, 2012 [47]李輝煌, “ANSYS工程分析基礎與觀念,” 高立圖書, 2009 [48]X. Chen and J. Yang, “Optimization of Longitudinal Beam for Improvement of Crashworthiness in Frontal and Offset Impacts,” Digital Manufacturing and Automation (ICDMA), 2012 Third International Conference, pp. 582-585, 2012 [49]黨沙沙, 許洋, 張紅松, “ANSYS 12.0多物理耦合場有限元分析從入門到精通,” 機械工業出版社, 2010 [50]ANSYS User’s Manual , ANSYS Inc [51]江國寧, “微電子系統封裝基礎理論與應用技術,” 滄海書局, 2006
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