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研究生:吳思怡
研究生(外文):Wu, S.I
論文名稱:延遲策略於記憶體IC製程之應用
論文名稱(外文):Postponement Strategy in Memory IC Manufacturing
指導教授:林則孟林則孟引用關係
指導教授(外文):Lin, Tse meng
學位類別:碩士
校院名稱:國立清華大學
系所名稱:工業工程與工程管理學系
學門:工程學門
學類:工業工程學類
論文種類:學術論文
論文出版年:2015
畢業學年度:103
語文別:中文
論文頁數:96
中文關鍵詞:大量客製延遲策略減震點模組化設計
外文關鍵詞:Mass customizationPostpone strategyDecoupling pointModular design
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IC設計公司常面臨光罩浪費與庫存水準過高問題,而晶圓投片在早期的生產策略採用預測生產,晶圓的採購以單一光罩版本組合對應單一產品下單的生產模式,以目標交期為投片起始點。對IC設計公司而言,要預測多個光罩版本的晶圓產出,容易因市場全球化與多樣化的客戶需求,讓預測常超出400%以上成本。 為了解決上述運作問題,本研究提出以晶圓生產延遲策略探討產品在設計階段,就考量為製造而設計的原則,設計模組化與製造流程模組化並嵌入多重減震點的形成方法。
本研究討論之個案公司在過去幾年來為達成大量客製、產品多樣化、降低cycle time及晶圓庫存的營運目標,常因此造成庫存與光罩成本暴增,為解決此問題,認為研發產品設計階段應結合光罩改善及生產製程與流程結構進行重設計。透過設計共用光罩模組,在晶圓半成品的投片前決定適合的半成品緩衝區,是延遲策略的核心,並作為生產計劃建置晶圓半成品庫存的依據。 本研究利用延遲策略中,依形式延遲與模組化延遲提出以共用光罩模組化與Design For Manufacturing的概念,整合多重減震點之差異化管理概念,減少IC設計產業產品庫存、降低Cycle time,並提升IC設計與製造一條龍的整合方法,為IC產業再添核心競爭力。
I. 本論文提出優化方法包含: (1)多重減震點(2)整合Design For Manufacturing共用光罩模組化的概念,應用於案例公司,已獲得成效包含: (1) 生產成本降低45%,(2) 庫存成本降低50%,(3)交期縮短20%等可見之成效。本論文提出根據延遲策略在IC設計的觀點,提出優化之步驟,包含:模組化設計、延遲策略與多重減震點之設計與執行、製程標準化與製程重排、推拉式生產策略等改善方法,完成建置多重減震點的重設計製造流程。

Abstract

IC design industry is a highly competitive Industry in the world. Although there are many demands for different applications such that IC design companies can survive by fulfilling these requirements, products are has shorter and shorter life cycles, However, they face a mask design cost wasted issue (over 400%) and an high level inventory cost.
A factory of wafer production cycles need usually 2 to 2.5 months. It has the most effort of an IC design company who produces his devices and tries to deliver to his customer. How to shorter an IC design company production cycle time would be an important issue for increasing an IC design company’s kernel competitive a advantage.
To solve these issues, this study proposes a novel postpone strategy methodology which base on design for manufacturing in which We propose a concept of common mask design within multi- decoupling point concepts to plan wafer production schedule.
In this paper, we develop a which can integrate and optimize design process and production process for an IC design company. In addition, we provide some production damping composite design and optimization algorithms to make product plan and management method smarter than traditional management method of production plan which includes: (1) multi decoupling point and (2) integration DFM concept (Design For Manufacturing) within common mask design principle.
After Implemented our research concept in case study company, we receive some good consequences which included (1) production cost reduced 40%, (2) inventory cost reduced 50% and (3) lead time reduced 20%.
II
This study collected the opinions of experts and scholars, and industries concepts of mass Customization and postponement strategies under various customizations to investigate how to enhance an IC design company’s kernel competitive capability. Furthermore, our research integrate four methods which include modular design, postponement strategy and multiple damping point execution, process standardization, process rearrangement and push-pull production strategies to increasing an IC design company’s kernel competitive capability.



目錄
中文摘要 I
英文摘要 II
誌謝 IV
目錄 V
圖目錄 VIII
表目錄 X
第一章 緒論 1
1.1研究背景與動機 1
1.2 研究目的 2
1.3 研究架構 3
1.4 研究範圍及限制 5
第二章 文獻探討 6
2.1. 大量客製化的概念的歷史 6
2.2 延遲理論 7
2.2.1. 延遲理論敏捷製造與供應鏈管理概論簡介 9
2.2.2. 延遲理論的種類: 10
2.2.3其他各學者對於延遲理論的說明: 15
2.2.4. 拉式延遲策略-減震點 (Decoupling Point;DP) 18
2.3. 推-拉式策略 19
2.3.1推式基礎供應鏈: 計畫性生產 19
2.3.2 拉式基礎供應鏈: 接單式生產 20
2.3.3推-拉式供應鏈 20
2.4. 模組化 22
2.4.1.模組化概念 23
2.4.2 模組的分類及模組化型態的分類 25
2.4.3模組化的優點 27
2.5. 可製造性設計概念的歷史(Design for Manufacturing , DFM) 28
2.6. IC製造的產業鏈中的DFM(Design for Manufacturability) 29
2.7小結 33
第三章 延遲策略於記憶體IC製程應用 34
3.1. IC設計產業面臨問題點 34
3.2 延遲策略在大量客製之分析 37
3.3延遲策略在大量客製步驟方法 37
3.3.1模組化設計 38
3.2.2製程標準化、製程重排 46
3.2.3延遲策略執行、多重減震點執行、推拉生產策略 47
3.2.4. 建立虛擬庫存水準與產銷回饋機制 52
3.4. 小結 54
第四章 IC設計業導入延遲策略之方法 55
4.1 IC設計業的產業特性: 55
4.2案例公司T半導體股份有限公司 56
4.2.1 公司簡介 56
4.2.2 產品研究範圍: 57
4.3 T公司採用延遲策略前所面臨的問題 58
4.4. 個案公司導入延遲策略的做法 58
4.4.1. 模組化設計 59
4.4.2.生產計劃之製程標準化與製程重排 69
4.4.3. 延遲策略執行、多重減震點推、推拉式生產策略執行: 70
4.4.4. 建立虛擬庫存水準與產銷回饋機制 73
4.5 個案公司推行延遲差異化策略後之成果 77
4.5.1 生產成本降低 77
4.5.2研發時程縮短 78
4.5.3庫存成本降低 78
4.5.4交期縮短 79
4.6討論分析 80
4.7小結 84
第五章 結論與建議 85
5.1 結論 85
5.2 建議 86
參考文獻 88

圖目錄
圖1-1研究架構 4
圖2-1 延遲策略在供應鏈中的位置 11
圖2-2 延遲策略與標準化 12
圖2-3 減震點與拉式延遲策略的關係 13
圖2-4 推-拉邊界(push – pull boundary) 21
圖2-5 Ulrich and Tung(1991)依照產品不同外型和功能模組分四類 26
圖2-6產品不同外型和功能模組分為四類 27
圖2-7 DFMA模擬工程研究之標準步驟 29
圖3-1晶圓製造延遲策略達成大量客製、少量多樣客製產品的步驟 38
圖3-2傳統IC 設計流程 40
圖3-3現在IC 設計流程 40
圖3-4 IC設計流程示意圖 41
圖3-5延遲差異化 43
圖3-6前段共用光罩層示意圖 45
圖3-7 後段差異光罩層示意圖 45
圖3-8傳統的IC設計公司單一光罩模組及單一產品的拉式生產示 49
圖3-9現行的IC設計公司共用光罩模組及多重減震點與推拉式延遲策略 51
圖3-10延遲差異化之DP示意圖 53
圖3-11 延遲差異化之多重DP示意圖 53
圖3-12 延遲差異化之多重DP示意圖 54
圖4-1 Flash Storage控制晶片 57
圖4-2市場規格VS Target schedule 60
圖4-3 DFM 光罩重設計前示意圖 61
圖4-4 DFM 光罩重設計後示意圖 61
圖4-5邏輯設計之流程圖 62
圖4-6 IC生產之流程簡圖 62
圖4-7開發階段到量產推上量時程前後比較 63
圖4-8光罩模組化與製程模組化對應示意圖 64
圖4-9 模組化與生產製造之減震點應用 66
圖4-10 模組化與生產製造之減震點應用 66
圖4-11 模組化與生產製造之減震點應用 67
圖4-12光罩模組化前,晶圓生產流程示意圖 70
圖4-13光罩模組化後,晶圓生產流程示意圖 70
圖4-14 IC design house 延遲差異化策略之推拉式生產流程圖 73
圖4-15光罩模組化前後晶圓C/T比較 80

表目錄
表2-1延遲理論 10
表2-2製造策略之基本概念 10
表2-3 延遲策略分析 15
表2-4 執行延遲產品差異化方法 17
表2-5 Feizinger 與Lee(1997)提出三種延遲手法 18
表2-6 供應鏈與推-拉邊界 22
表2-7模組化的定義 24
表3-1 史(2009)文獻特色、優缺點 52
表4-1 IC設計領域分類 57
表4-2 光罩模組產品族設計 65
表4-3 產品族A版光罩分類 67
表4-4 產品族B版光罩分類 68
表4-5 產品族C版光罩分類 68
表4-6光罩版本與產品族對應表 69
表4-7 光罩模組化生產成本比較 78
表4-8 光罩模組化生產CT & LT比較 79
表4-9 IC設計業之延遲策略與文獻表較表 81



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網站資料:
[1] 台積電. (2014). 台積電. 擷取自 http://www.tsmc.com.tw/
[2] 國立宜蘭科技大學architecture&it, IC內部結構名稱. 擷取自
http://www.slidefinder.net/-/1--vhdla/32205527/p2
[3] 經濟部工業局. (2014). 經濟部工業局半導體產業評析. 擷取自 http://www.idb-si.net/
[4] 【CIC Referenced Flow for Cell-based IC Design】國研院晶片
中心設計服務組.擷取自(2008.05)
http://www.cic.narl.org.tw/techpaper/pdf/CIC-DSD-RD-08-01.pdf
[5] ITIS. (2014). 工業技術研究院ITIS 產業評析. 擷取自 http://www.itri.org.tw/index.jsp/
[6] IC 設計流程簡介,擷取自
http://shininglionking.blogspot.tw/2013/05/2-ic.html


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