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研究生:陳宏昱
研究生(外文):Chen, Hung-Yu
論文名稱:應用於邏輯製程之回填型接觸點電阻式記憶體研究
論文名稱(外文):The Study of Backfill Contact Resistive Random Access Memory in CMOS logic Technologies
指導教授:金雅琴
指導教授(外文):King,Ya-Chin
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2015
畢業學年度:103
語文別:中文
論文頁數:62
中文關鍵詞:邏輯製程非揮發性記憶體電阻式記憶體1T1R
外文關鍵詞:logic NVMRRAM1T1R
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在半導體製程持續的快速進展下,從移動式電子產品到穿戴式電子產品都追求著低功耗和高密度的方向。意指著記憶體元件勢必要往非揮發記憶體(Nonvolatile Memory, NVM)靠攏,但是目前主流的快閃記憶體(Flash Memory)面臨到操作電壓太高和製程微縮的問題。於是在新型非揮發記憶體中的電阻式記憶體有極大的潛力。
本篇論文改善先前提出的接觸點電阻式記憶體(Contact Resistive Random Access Memory, CRRAM),在原先的做法是利用接觸窗大小控制蝕刻電阻保護氧化層(Resistor Protection Oxide, RPO)效率。但因蝕刻變異性過大,導致薄膜厚度不均勻,進而導致電性變異與良率過低。
為此發展出新型結構為回填型接觸點電阻式記憶體(Backfill Contact Resistive Random Access Memory, BCRRAM),在蝕刻接觸窗時,會以過蝕刻的方式將電阻保護層結構清除,以利於厚度控制。接著用電漿化學氣相沉積(Plasma-enhanced chemical vapor deposition, PECVD)回填二氧化矽(SiO2),達到良好的厚度控制,且可套用於其他世代製程上。此結構可以接受一百萬次循環設定與重置和85oC二千小時烘烤,仍顯示可靠的資料儲存。
最後因為回填型接觸點電阻式記憶體是單極性電阻式記憶體,在操作時有過度寫入(Over Programming)疑慮。為了穩定元件的操作,導入逐步增加脈衝寫入(Incremental-step-pulse programming, ISPP),逐步增加電壓更完善的控制阻值轉換,以達到提高耐久度。在一百萬次操作中,高低阻態差皆大於50倍。

In recent years, VLSI technology develops rapidly. Portable and wearable electronics products demanding low power high density nonvolatile memory. Flash Memory, the mainstream NVM, faces high operating voltage and process scaling problems, so resistive random access memory shows great potential in advance NVM devices.
This study proposed methods to improve the developmental issues of Contact Resistive Random Access Memory (CRRAM).The original CRRAM is fabricated by controlling RRAM thickness and contact size. Due to instability of contact hole etching rate, RRAM film could be non-uniform and affect yield rate. Backfill Contact Resistive Random Access Memory (BCRRAM) is proposed to solve this problem. A thin RRAM film is deposited into each contact hole by PECVD, instead. The BCRRAM can endure 1000k cycles and 85oC 2000hr baking without data alternation. Through experiment, the device proves no reliability concerns.
BCRRAM is a unipolar RRAM. Over programming damage may occur during reset operation. Therefore, Incremental Step Pulse Programming (ISPP) is included to optimize SET/RESET cycles to improve BCRRAM endurance. The ratio of LRS/HRS is greater than 50X, with more than 1000k cycles.

內文目錄
摘要 i
Abstract ii
致謝 iii
內文目錄 iv
附圖目錄 vi
附表目錄 viii
第一章 序論 1
1.1 非揮發性記憶體發展 1
1.1.1 磁阻式記憶體 1
1.1.2 相變化記憶體 2
1.1.3 電阻式記憶體 2
1.2 論文大綱 3
第二章 電阻式記憶體研究回顧 9
2.1 電阻式記憶體阻值切換模型 9
2.2 初始化操作 10
2.3 阻值切換操作與極性特性 10
2.4 電阻式記憶體介紹 10
第三章 接觸點電阻式記憶體研究 22
3.1 製程流程與元件結構 22
3.2 量測環境介紹 23
3.3 元件電性操作 23
3.4 電阻式薄膜厚度探討 24
3.5 可靠度分析 25
3.6 逐步增加脈衝(Incremental Step Pulse Programming, ISPP) 26
3.6.1 應用於改善元件操作 26
3.6.2 可靠度改善 27
3.7 小結 27
第四章 總結 56
參考文獻 57

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