臺灣博碩士論文加值系統

隨著無線通訊技術的快速發展、半導體製程技術的演進及積體電路的需求，用互補式金氧半場效電晶體實現的射頻電路逐漸成為市場上發展的新趨勢，在發射機系統當中主要的功率消耗來自於功率放大器，因此功率放大器在之中佔有舉足輕重的地位。因應現在行動裝置的普及化，高效率儼然成為功率放大器最重要的發展指標，因此本論文將著重在用互補式金氧半場效電晶體實踐高效率的功率放大器與分析。
在第二章中討論了E類功率放大器的操作原理及探討實際應用在製程當中會遇到的非理想效應，包含電晶體當中的寄生電阻、寄生電容等對E類功率放大器的影響，最後，在180奈米互補式金氧半場效電晶體製程實作一個5.3GHz的E類功率放大器，量測結果可以量到40%以上的PAE。在第三章中，考量到一般Ｅ類放大器在互補式金氧半場效電晶體會有過大的寄生電容導致E類功率放大器的效率降低且輸出功率都不足，因此用變壓器去達到功率結合及單端與差動訊號的轉換，這樣可以在高輸出功率時依舊擁有良好的轉換效率，最終的量測結果不僅能達到25dBm以上的輸出功率，PAE的量測結果也達到32%。在第四章中因應現在無線通訊的快速發展，能夠應用在雙頻帶的功率放大器的需求急遽增加，因此輸出端應用可變電容去切換讓電路在雙頻帶皆能達到最好的輸出功率及功率轉換效益，輸入端則同時匹配到50歐姆阻抗達到縮小面積的目標，在雙頻帶的量測結果PAE皆有30%以上的水準。

With the rapid growth of semiconductor process, demand of integrated circuit and development of wireless communication systems, implementing RF integrated circuit with CMOS process become a new development trend for the industry market. In the transceiver design, most of power consumption is come from power amplifier, thus power amplifier is a key component for RF circuit design. Because of widespread of mobile devices, high efficiency becomes a focus point for power amplifier design. As mentioned above, the design and analysis of high efficiency CMOS power amplifier is the topic of this thesis.
In chapter 2, the operation principles of class-E power amplifier is introduced and also discuss non-ideal effect on CMOS process, including parasitic resistance and capacitance of transistor. In the end of this chapter, a 5.3 GHz WLAN application single ended class-E power amplifier is presented, from the measurement result the circuit can achieve over 40% PAE and has output power of 21dBm.
In chapter 3, because of parasitic capacitance of CMOS transistor, we choose smaller device size to reduce parasitic capacitance and use transformer combine technique to obtain high output power also maintain high efficiency of class-E operation. The measurement result we achieve over 25dBm output power and PAE of 32%.
In chapter 4, due to the rapid expansion of wireless communication, demand of dual band power amplifier growth rapidly. For class-E design, shunt capacitance is a critical design parameter. Thus we use varactor to adjust shunt capacitance and make the circuit has best power performance at two design frequencies. From measurement result, we can achieve over 30% PAE for dual band applications.

Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 2
Chapter 2 A 5.3 GHz Fully Integrated Class-E Power Amplifier 3
2.1 Introduction 3
2.2 Ideal Class-E Power Amplifier Operation 4
2.3 Analysis on Non-Ideal Class-E Power Amplifier 17
2.3.1 Finite Switching Time 18
2.3.2 Finite “ON” and “OFF” Resistance 19
2.3.3 Nonlinear Parasitic Capacitance 20
2.3.4 Power Loss of Common Source Class-E Power Amplifier 21
2.3.5 Power Loss of Cascode Class-E Power Amplifier 22
2.4 Circuit Design 23
2.4.1 Bias and Device Selection 24
2.4.2 Design Flow 27
2.4.3 Input and Output Matching Network 29
2.4.4 5.3 GHz Class-E Power Amplifier 32
2.5 Simulation Result 34
2.5.1 Small-signal Simulation 34
2.5.2 Large-signal Simulation 35
2.5.3 Transient Simulation 36
2.6 Experimental Result 38
Chapter 3 5.3GHz Class-E Power Amplifier with Transformer Combine 42
3.1 Introduction 42
3.2 Circuit Design 44
3.2.1 Output Transformer Design 48
3.2.2 Input Transformer Design 51
3.2.3 Transformer Combine Class-E Power Amplifier 53
3.3 Simulation Result 56
3.3.1 Small-signal simulation 56
3.3.2 Large-signal simulation 57
3.3.3 Transient Simulation 58
3.4 Experimental Result 60
Chapter 4 2.4GHz / 5GHz Fully Integrated Dual-Band Class-E Power Amplifier 64
4.1 Introduction 64
4.2 Circuit Design 65
4.2.1 Output Matching Network Design 65
4.2.2 Input Matching Network Design 70
4.2.3 Dual Band Class-E Power Amplifier 75
4.3 Simulation Result 77
4.3.1 Small-signal Simulation 77
4.3.2 Large-signal Simulation 79
4.3.3 Transient Simulation 81
4.4 Experimental Result 83
Chapter 5 Conclusions 92
REFERENCE 93

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