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研究生:許鈞凱
研究生(外文):Jyun-Kai Hsu
論文名稱:由平面方程式求鈍角三角形內部向量及二維元件模擬
論文名稱(外文):Finding the internal vector from the plane equation in obtuse triangle element for 2D Semiconductor device simulation
指導教授:蔡曜聰
指導教授(外文):Yao-Tsung Tsai
學位類別:碩士
校院名稱:國立中央大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2016
畢業學年度:104
語文別:中文
論文頁數:54
中文關鍵詞:半導體模擬鈍角三角形二維三角形平面方程式
外文關鍵詞:semiconductorsimulationobtuse triangletwo dimensionaltriangleplane equation
相關次數:
  • 被引用被引用:0
  • 點閱點閱:133
  • 評分評分:
  • 下載下載:8
  • 收藏至我的研究室書目清單書目收藏:0
在本篇論文中,我們開發出新型重心版模組,能以任意三角形網格當基本元素,模擬二維的半導體元件,相對於以往需要避開或忽略鈍角三角形的產生,新版模組增加網格設定的彈性空間,並且有效減少模擬需要的節點數;首先我們利用簡易電阻驗證其理論電阻值,並且模擬PN二極體的特性曲線作驗證,接著將新版模組應用至圓柱形元件,開發出新形的梯形網格分割方式,探討其模擬精確值,最後分析當新版模組遇到大角度鈍角三角形網格時的模擬問題。
In this thesis, we have successfully developed a new type module which is composed of any triangle mesh elements to simulate 2D semiconductor device. The new type module increases the flexibility to set up the mesh, and it can also effectively decreases the total amount of computation nodes. At first, a simple 2D resistor and PN diode will be simulated and compared to the theoretical for verification. Then, the new module will be applied to simulate the cylindrical semiconductor element by the new version of the trapezoidal mesh segmentation mode, and the simulation result will be compared to the exact value. Finally, we will discuss the problem when the new type module is used to simulate the large angle obtuse triangle mesh.
目錄

摘要.....................i
Abstract................ii
目錄....................iii
圖目錄....................iv
表目錄....................vi
第一章 簡介.................................1
第二章 程式原理與架構介紹....................3
2.1 二維矩形網格模型介紹..............3
2.2 外心與重心於三角形網格之分析.......7
2.3 平面方程式於三角網格之分析.........9
第三章 三角形網格於二維半導體之模擬...........18
3.1 包含鈍角三角形網格模組之電阻驗.........18
3.2 包含鈍角三角形網格模組的二極體之驗證....20
3.3 重心版與外心版模組之比較...............22
第四章 梯形網格延伸與分裂之應用...............28
4.1 標準梯形元件之開發....................28
4.2 梯形分裂與標準梯形元件之比較...........33
4.3 大鈍角三角形的問題探討.................36
第五章 結論.................................40
參考文獻 .....................................41


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[2]Y. S. Tso, “Analysis and simulation cylindrical coordinates of curved PN junction properties,” M. S. Thesis, Institute of EE, Nation Central University, Taiwan, Republic of China, 2010.

[3]Z. Z. Lin, “Development of Obtuse triangle element and its applications to 2D Semiconductor device,” M. S. Thesis, Institute of EE, Nation Central University, Taiwan, Republic of China, 2015.

[4]M. B. Patil, “New discretization scheme for two-dimensional semiconductor device simulation on triangular grid,” IEEE Trans, Computer-Aided Design of Integrated Circuits and Systems, vol. 17, no. 11, pp. 1160-1165, Nov. 1998.

[5]D. A. Neamen, Semiconductor physics and devices, 3rd ed., McGraw-Hill Companies Inc., New York, 2003.

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[7]S. H. Huang, “Analysis and Simulation of Semiconductor devices by triangular and trapezoidal meshes in cylindrical coordinate,” M. S. Thesis, Institute of EE, Nation Central University, Taiwan, Republic of China, 2013.

[8]C. C. Lin and M. E. Law, “2-D mesh adaption and flux discretization for dopant diffusion modeling,” IEEE Trans, Computer-Aided Design of Integrated Circuits and Systems, vol. 15, no. 2, pp. 194-207, Feb. 1996.

[9]K. Tanaka, A. Notsu, and H. Matsumoto, “A new approach to mesh generation for complex 3D semiconductor devices structures,” IEEE Trans, Simulation of Semiconductor Process and Devices, Sep. 1996.

[10]Z. Gao and J. Wu, “A small stencil and extremum-preserving scheme for anisotropic diffusion problems on arbitrary 2D and 3D meshes,” Journal of Computational Physics., vol. 250, pp. 308-331, Oct. 2013.

[11]F. Rudolf, J. Weinbub, K. Rupp, A. Morhammer, and S. Selberherr, “Template-based mesh generation for semiconductor devices,” IEEE Trans, Simulation of Semiconductor Process and Devices, 9-11 Sep. 2014.

[12]F. Hecht and A. Marrocco, “Mesh adaption and numerical simulation of semiconductor devices,” European Congress on Computational Methods in Applied Sciences and Engineering, 11-14 Sep. 2000.

[13]C. Shen, L. T. Yang, G. Samudra, and Y. C. Yeo, “A new robust non-local algorithm for band-to-band tunneling simulation and its application to Tunnel-FET,” Solid-State Electronics., vol. 57, no. 1, pp. 23-30, Mar. 2011.

[14]S. W. Bova and G. F. Carey, “A distributed memory parallel element-by-element scheme for semiconductor device simulation,” Computer Methods in Applied Mechanics and Engineering., vol. 181, no. 4, pp. 403-423, Jan. 2000.

[15]S. Micheletti, “Stabilized finite elements for semiconductor device simulation,” Computing and Visualization in Science., vol. 3, no. 4, pp. 177-183, Jan. 2001.

[16]S. Holset, A. Jungel, and P. Pietra, “A mixed finite element discretization of the energy transport model for semiconductors,” SIAM Journal on Scientific Computing., vol. 24, no. 6, pp. 2058-2075, 2003.

[17]L. Giraud, A. Marrocco, and J. C. Rioual, “Iterative versus direct parallel substructuring methods in semiconductor device modelling,” Numerical Linear Algebra with Applications., vol. 12, no. 1, pp. 33-53, Jun. 2004.

[18]P. Causin, M. Restelli, and R. Sacco, “A simulation system based on mixed-hybrid finite elements for thermal oxidation in semiconductor technology,” Computer Methods in Applied Mechanics and Engineering., vol. 193, no. 33, pp. 3687-3710, Aug. 2004.

[19]M. A. Padron, J. P. Suarez, and A. Plaza, “Refinement based on longest-edge and self-similar four-triangle partitions,” Mathematics and Computers in Simulation., vol. 75, no. 5, pp. 251-262, Sep. 2007.

[20]G. F. Carey, A. L. Pardhanani, and S. W. Bova, “Advanced Numerical Methods and Software Approaches for Semiconductor Device Simulation,” VLSI Design., vol. 10, no. 4, pp. 391-414, 2000.




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