穿隧式場效電晶體本身是利用載子在能帶間的穿隧來產生電流，因此在常溫下次臨限擺幅可以突破60 mV/decade的限制，有別於金氧半場效電晶體次臨限擺幅受限於kT/q的影響。然而傳統矽基穿隧式場效電晶體因為矽本身擁有較大的材料能隙，使得元件受限於低的導通電流。由於III-V族材料穿隧式場效電晶體具有較低的材料能隙可以改善導通電流不足的問題，再近一步的利用異質的結構可以在接面處形成更小的等效穿隧能障來獲得更大的導通電流，但也因為載子更容易的在接面處發生穿隧，導致電晶體在關閉狀態下有漏電流增加的問題。
本論文著重於改善銻砷化鎵/砷化銦鎵異質結構穿隧式場效電晶體漏電流的問題，並維持相同或者更高的導通電流，得到高Ion/Ioff的特性以及更小的次臨限擺幅，所使用的磊晶為p+-i-n+摻雜的銻砷化鎵/砷化銦鎵異質結構，源極為p+銻砷化鎵，摻雜碳元素，電洞濃度大於5 × 1019 cm-3，砷的莫耳比例為51%，銻的莫耳比例為49%；汲極為n+砷化銦鎵，摻雜矽元素，電子濃度大於1 × 1018 cm-3，銦的莫耳比例為53%，鎵的莫耳比例為47%，通道i層為砷化銦鎵，厚度為150 nm。
論文中主要分為兩種研究方法來改善漏電流的問題，第一種方法為在電晶體的製作過程中加入一道絕緣高台的製程，在第一道製程中利用曝光顯影定義出絕緣高台(Mesa)的圖形，接著使用磷酸溶液進行濕式蝕刻將絕緣高台外的區域移除掉，在半絕緣的InP基板上形成絕緣高台，達到電晶體與電晶體之間的電性隔離，進而減少金屬探針電極(probe pad)之間偏壓的影響，有效的抑制住關閉狀態下的漏電流。在室溫的條件下，具有絕緣高台的穿隧式場效電晶體其漏電流可由1.19 × 10-1 μA/μm下降至3.26 × 10-3 μA/μm，且可以得到相當於未具有絕緣高台之穿隧式場效電晶體之最大導通電流21.08 μA/μm，最小次臨限擺幅可由358 mV/decade改善至172 mV/decade，藉由加入絕緣高台的製程，成功的抑制住關閉狀態下的漏電流，同時可以得到相同或更佳的導通電流，進一步的提升電流開關比，並提升閘極對通道的控制能力。第二種研究方法為使用磊晶結構改善的方式，針對銻砷化鎵/砷化銦鎵穿隧式場效電晶體在靠近汲極端通道的地方加入一層高能隙的銻砷化鎵材料形成一新穎的複合式通道的穿隧式場效電晶體。在關閉狀態下，高能隙的銻砷化鎵可以使源極端發生穿隧的載子無法輕易的跨越到達汲極端，並且可以抑制住載子在汲極端的接面處發生穿隧，解決雙極性行為的問題，使得複合式通道穿隧式場效晶體可以得到更小的關閉電流。在室溫且理想的條件下，藉由Silvaco Atlas模擬，漏電流可以改善約5個數量級，在導通的狀態下，由於傳輸通道能帶下拉的關係，使得發生穿隧的載子不需要跨過高能隙的銻砷化鎵，因此可以同時得到相當於銻砷化鎵/砷化銦鎵穿隧式場效電晶體的最大導通電流，進一步的到更高的電流開關比。

Tunnel field effect transistors (TFETs) are based on band-to-band tunneling (BTBT) to generate the current. Therefore subthreshold swing (S.S.) can be less than 60 mV/decade while operating at room temperature. Unlike traditional metal oxide semiconductor field effect transistors (MOSFETs), which is based on drift-diffusion carriers to generate the current, which S.S. is limited by kT/q. However, TFETs suffer from low ON-state currents by using large bandgap silicon based material. Because III-V material have narrow and direct bandgap, it can increase the tunneling probability to improve the ON-state currents. And further using hetero-structure in the source side can reduce effective tunneling barrier height Ebeff to get higher ON-state current. However, carriers may easily tunnel at the source side junction, resulting the TFET in the OFF-state with high leakage current.
This study focuses on improving the GaAsSb/InGaAs hetero-junction Tunneling field effect transistors leakage current problem and maintaining the same or higher ON-state currents, thus higher Ion/Ioff and better subthreshold swing can be obtained. In a hetero-epitaxial structure p+-i-n+ GaAsSb/InGaAs material was used. Sourse material is a heavy doped p+-GaAsSb. Drain material is a heavy doped n+-InGaAs. The channel material is a 150 nm undoped InGaAs layer.
This paper investigates two methods to improve the leakage current. The first method is to use the mesa isolation process in the fabrication of transistor. Use optical exposure to define the mesa pattern, and followed by wet etching using a phosphoric acid solution to remove the outer region of the mesa pattern and stop on semi-insulating InP substrate. Mesa isolation is to achieve electrical isolation between the transistors. It is possible to reduce the current flow between the probe pads to suppress the leakage current in the OFF-state. At room temperature conditions, TFET with mesa isolation showed leakage current (Ioff) reduced from 1.19 × 10-1 μA/μm to 3.26 × 10-3 μA/μm, and a higher on-state current (Ion) of 21.08 μA/μm compared to TFET without mesa isolation. Minimum subthreshold swing is reduced from 358 mV/decade to 172 mV/decade. The second method is to design an new epitaxial structure to improve the leakage problem. For GaAsSb/InGaAs hetero-junction TFET a high bandgap GaAsSb material is inserted in near drain side channel and formed a composite channel. In the OFF-state, the high band gap material can prevent the electron from source side tunneling to the drain side to reduce the several leakage current. And high band gap material can suppress the electron from channel tunneling to the drain side resolve the ambipolar behavior successfully. By Silvaco Atlas simulation, composite channel hetero-junction TFET shows leakage current can be reduced by five orders of magnitude and demonstrates higher ON-state currents compared to GaAsSb/InGaAs hetero-junction TFET. Therefore, higher on/off current ratio (Ion/Ioff) is observed.

摘要 I
Abstract III
致謝 V
目錄 VI
圖目錄 VIII
表目錄 XII
第一章 導論 1
1.1穿隧式場效電晶體研究發展 1
1.2研究動機 18
1.3論文架構 19
第二章 穿隧式場效電晶體電性改善研究 20
2.1 前言 20
2.2穿隧理論與穿隧電流 20
2.3穿隧式場效電晶體操作機制 23
2.4穿隧式場效電晶體元件特性的重要參數介紹 25
2.5穿隧式場效電晶體之雙極性行為(Ambipolar behavior)介紹 25
2.6穿隧式場效電晶體之改善關閉狀態下漏電流研究方向 26
2.7結論 30
第三章 有無高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之元件電性分析 31
3.1前言 31
3.2銻砷化鎵/砷化銦鎵磊晶結構 31
3.3加入高台絕緣製程的穿隧式場效電晶體製作流程 31
3.4製程過程中有無加入高台絕緣製程之元件特性分析 39
3.4.1未具有高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之元件特性 41
3.4.2具有高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之元件特性 45
3.4.3製程過程有無加入高台絕緣製程之元件特性比較 48
3.5有無加入高台絕緣製程的穿隧式場效電晶體之脈衝量測分析 55
3.6結論 59
第四章 具有高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之電晶體尺寸對元件特性的影響分析 60
4.1前言 60
4.2具有高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之分析汲極金屬長度2 µm與4 µm元件特性 60
4.2.1具有高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之汲極金屬長度2 µm元件特性 61
4.2.2具有高台絕緣的銻砷化鎵/砷化銦鎵穿隧式場效電晶體之汲極金屬長度4 µm元件特性 61
4.2.3汲極金屬長度2 µm與4 µm之元件特性比較 63
4.3結論 70
第五章 銻砷化鎵/砷化銦鎵/銻砷化鎵/砷化銦鎵複合式通道穿隧式場效電晶體之元件特性的模擬分析 71
5.1前言 71
5.2複合式通道穿隧式場效電晶體之元件結構 71
5.3複合式通道穿隧式場效電晶體之元件操作機制 72
5.4複合式通道穿隧式場效電晶體之不同LWB元件特性分析 75
5.5複合式通道穿隧式場效電晶體與銻砷化鎵/砷化銦鎵穿隧式場效電晶體之模擬特性比較 77
5.6 結論 80
第六章 總結與未來展望 82
參考文獻 84

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