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研究生:鄭博仁
研究生(外文):Cheng, Po-Jen
論文名稱:具智能開關電流模式單電感雙輸出直流對直流穩壓器設計
論文名稱(外文):Design of a Current-Mode Single-Inductor Dual-Output DC-DC Buck Converterwith Smart Switch Control
指導教授:葉美玲葉美玲引用關係
指導教授(外文):Yeh, Mei-Ling
口試委員:林嘉洤黃淑絹
口試委員(外文):Lin, Jia-ChuanHuang, Shu-Chuan
口試日期:2016-01-22
學位類別:碩士
校院名稱:國立臺灣海洋大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2016
畢業學年度:104
語文別:中文
論文頁數:71
中文關鍵詞:單電感雙輸出降壓穩壓器能量分佈控制電流模式
外文關鍵詞:Single-Inductor Dual-OutputBuck RegulatorPower-Distributive ControlCurrent Mode
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隨著科技的進步與使用習慣的改變,可攜式電子設備使用上已不被侷限在單一功能中。在同一設備中納入各式功能模組的產品越來越多,而其對電源的需求也越來越多樣化,因此一個能提供高穩定性與高轉換效率輸出,同時不佔用過大面積的電源供應器為一大課題。

本研究因應現今可攜式電子產品的需求,採用單電感雙輸出穩壓器架構減少被動元件的使用數量,改善穩壓器晶片於整體系統中的占用面積,同時令其製造成本降低。另一方面為了提供更穩定的穩壓輸出將提高穩壓器的操作頻率,其所帶來的優點除了降低輸出端的漣波電壓之外,也可降低穩壓器架構中所使用的電感及電容值。穩壓器控制訊號採用脈波寬度調變方式,在其重載有出色的轉換效率基礎上以功率級電晶體開關智能切換方式,減少輕載時的切換損失,改善其轉換效率,使整體轉換效率能維持於一定水準。

整體設計使用國家晶片系統設計中心(CIC) 所提供的TSMC 0.35um Mixed-Signal 2P4M Polycide 的製程技術,使用電流模式以能量分佈控制方法實現單電感雙輸出降壓穩壓器之設計,並利用智能控制改變功率級電晶體開啟尺寸,改善PWM輕載效率。可正常工作的電壓範圍於3V~4.2V,符合現階段鋰離子聚合物電池之應用。整體操作頻率為5.5MHz,第一端輸出電壓為2.5V其輸出漣波為8.6mV,第二端輸出電壓為1.8V輸出漣波8.8mV。各輸出可操作負載電流範圍25~250mA,當負載總電流於300mA時可得最大轉換效率80.7%,晶片整體總面積為2.072mm×2.387mm。

With the advancement of technology and the changing habits, the portable electronic devices have not limited to a single function. More and more products incorporate a variety of functions, so the requirement of power supply has become increasingly diverse. Therefore, a high stability output, high conversion efficiency and smaller area power supply will be a major issue.

This thesis is responded to the requirement of today's portable electronic products. The regulator uses single-inductor dual-output architecture to reduce the number of passive components and the area in overall chip while reducing manufacturing costs. On the other hand, increasing operating frequency in regulator is to provide a more stable output. The advantages of increasing operating frequency not only decrease the output ripple, but also reduce the values of inductance and capacitance in regulator. The regulator uses pulse width modulation (PWM), which has high conversion efficiency in heavy loads. On the basis of that, the power stage transistor’s size can change by smart switch control to reduce switching losses at light loads and improve its conversion efficiency. Therefore, the overall conversion efficiency can be maintained at a certain level.

The overall design is implemented by TSMC 0.35um Mixed-Signal 2P4M Polycide process, which is provided by National Chip Implementation Center (CIC). The regulator uses current mode and Power-Distributive Control (PDC) to achieve a single-inductor dual-output buck regulator. The smart switch control changes power stage transistor’s size to improve the efficiency of PWM at light loads. The regulator can be used by lithium ion polymer battery with a working voltage range from 3V to 4.2V. The overall operating frequency is 5.5MHz. The first output voltage is 2.5V and output ripple is 8.6mV. The second output voltage is 1.8V and output ripple is 8.8mV. The load current range to each output is 25mA to 250mA. The maximum efficiency of the conversion is 80.7% when the total load current is 300mA. The overall size of chip is 2.072mm × 2.387mm.

摘要
Abstract
目次 Ⅰ
圖目次 Ⅲ
表目次 Ⅵ
第一章 緒論 1
1.1研究動機與目的 1
1.2論文架構 3
第二章 直流對直流穩壓器介紹 4
2.1穩壓器介紹 4
2.1.1線性穩壓器 4
2.1.2交換式穩壓器 5
2.1.2.1降壓型交換式穩壓器 5
2.1.2.2升壓型交換式穩壓器 8
2.1.2.3升降壓型交換式穩壓器 10
2.1.3穩壓器的比較 12
2.2交換式穩壓器控制模式 12
2.2.1電壓控制模式 13
2.2.2電流控制模式 14
2.2.3控制模式的比較 18
2.3交換式穩壓器調變模式 19
2.3.1脈衝寬度調變模式 19
2.3.2脈衝頻率調變模式 20
第三章 具智能開關單電感雙輸出穩壓器設計 21
3.1單電感雙輸出穩壓器工作原理 21
3.1.1能量分佈控制 22
3.1.2分時多工控制 27
3.2智能開關控制 31
3.3補償電路 32
3.4系統架構與規格 35
第四章 子電路設計與模擬 37
4.1誤差放大器 37
4.2偏壓電路 42
4.3遲滯比較器 44
4.4帶差參考電壓 46
4.5軟啟動電路 49
4.6 RS-Latch 50
4.7鋸齒波與時脈產生電路 51
4.8電流感測電路 52
4.9電壓對電流轉換器 54
4.10非重疊控制緩衝電路 56
第五章 模擬結果與佈局 59
5.1設計流程 59
5.2電路佈局與考量 60
5.3輸出漣波電壓 61
5.4線性穩壓調節率模擬 62
5.5負載與交互穩壓調節率模擬 63
5.6智能開關切換 65
5.7效率總結 66
5.8文獻比較 67
第六章 結論與未來展望 68
參考文獻 70


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[18] Ka Nang Leung and P. K. T. Mok, “A Sub-1-V 15-ppm/°C CMOS Bandgap Voltage Reference without Requiring Low Threshold Voltage Device,” IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 526-530, Apr. 2002.
[19] Hirokazu Tsujimoto and Tetsuo Tateishi, “Soft Starting Reference Voltage Circuit,” United States Patent, Patent Number 6,348,833, Feb. 19, 2002.
[20] Wan-Rone Liou, Mei-Ling Yeh, and Yueh Lung Kuo, “A High Efficiency Dual-Mode Buck Converter IC for Portable Applications,” IEEE Trans. Power Electronics, vol. 23, no. 2, pp. 667-677, Mar. 2008.
[21] Bryan A. Legates, “Low Voltage Current Sense Amplifier,” United States Patent, Patent Number 5,969,574, Oct. 19, 1999.
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[25] Wei-Hsun Chang, Jia-Hui Wang, and Chien-Hung Tsai, “A Peak-Current Controlled Single-Inductor Dual-Output DC-DC Buck Converter with A Time-Multiplexing Scheme,” International Symposium on VLSI Design Automation and Test (VLSI-DAT), pp. 331-334, 2010.
[26] G. S. Lin, H. P. Chou, and W.S. Liu, “A Single-Inductor Dual-Output Step-Down DC-DC Converter,” IEEE 10th International Conference on Power Electronics and Drive Systems, pp. 383-388, 2013.

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