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研究生:陳金生
研究生(外文):CHEN,JIN-SHENG
論文名稱:低啟動電壓的高效率獵能電路
論文名稱(外文):A High-efficiency Energy Harvesting Circuit with Low-startup Voltage
指導教授:黃弘一
指導教授(外文):HUANG,HONG-YI
口試委員:黃弘一鄭國興洪浩喬林嘉洤郭岳芳
口試委員(外文):HUANG,HONG-YICHENG,KUO-HSINGHONG,HAO-CHIAOLIN,JIA-CHUANKUO,YUE-FANG
口試日期:2016-06-20
學位類別:碩士
校院名稱:國立臺北大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2016
畢業學年度:104
語文別:中文
論文頁數:91
中文關鍵詞:極低電壓獵能電路鎳氫電池電池充電
外文關鍵詞:battery chargingharvest circuitNiNH batteriesultra-low voltage
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本論文提出一極低電壓獵能電路,除了外接電感外,無其它被動元件,最低系統供應電壓為0.1V時,電路可以正常啟動升壓至0.7V;而系統供應電壓為0.23V時,輸出電壓可以提升至1.2V以上,對鎳氫充電電池進行定電流300uA充電。電路設計方面針對低電壓之MOS可變電容進行比較最後選擇了累積型MOS (Accumulation MOS)可變電容,在升壓電路第一級使用低電壓啟動電路且使用原生性(Native)元件,使電路可以在極低電壓工作,後兩級差動式電荷幫浦使用DTCMOS(Dynamic Threshold-Voltage CMOS)技巧把效率提高。整體系統的供應電壓可藉由自然能源提供,產生0.23V以上的供應電壓,再使用本晶片之獵能電路對電池進行充電。此晶片由TSMC 0.18um 1P6M標準製程實現,晶片面積為0.938×0.86mm2,消耗功率為566uW,在供應電壓0.23V情況下,最高效率達到56%。
This thesis presents an ultra-low voltage harvest circuit, other than the chip itself there aren’t any other passive components. When the smallest power supply is 0.1V, the circuit can function normally and can boost up to 0.7V. If the power supply is 0.23V, the output voltage can reach up to 1.2V. The NiNH battery can have a current flow of 300uA while charging. As for the circuit design, when comparing various MOS variable capacitor in a low voltage condition the best suitable type is the Accumulation-MOS variable capacitor. In the first stage of the booster circuit, we use the low-voltage starter to implement the native device; causing the circuit to operate in an ultra-low voltage environment. The last two stage’s differential charge pump uses DTCMOS (Dynamic Threshold-Voltage CMOS) technique to improve its efficiency. The entire system’s power supply can use natural energy to produce 0.23V or more of power supply. Implementing this chip and ultra-low voltage harvest circuit, we can charge NiNH batteries. This chip is manufactured by TSMC with 0.18um 1P6M standards, its size is 0.938*0.86mm2 with a power consumption of 556uW. Nonetheless, when the power supply is 0.23V, it can achieve an efficiency of up to 56%.
誌 謝 …………………………………………………………… I
中文論文提要 …………………………………………………………… II
英文論文提要 …………………………………………………………… III
目 錄 …………………………………………………………… V
圖目錄 …………………………………………………………… VIII
表目錄 …………………………………………………………… VIII

第一章 緒論 …………………………………………………………… 1
1.1. 研究動機與目的 …………………………………………………………… 1
1.2. 論文章節架構 …………………………………………………………… 2

第二章 先前技術探討 …………………………………………………………… 3
2.1. 電容電感振盪器介紹 …………………………………………………………… 3
2.2. 電容種類介紹 …………………………………………………………… 7
2.3. 電荷幫浦電路之探討 …………………………………………………………… 13
2.4. 充電方法之探討 …………………………………………………………… 20

第三章 極低電壓獵能電路設計架構 …………………………………………………………… 24
3.1. 能源收集系統 …………………………………………………………… 24
3.2. 電感電容振盪器電路 …………………………………………………………… 25
3.3. 低電壓MOS可變電容器特性分析 …………………………………………………………… 28
3.4. 低電壓啟動電路 …………………………………………………………… 32
3.5. 差動式DTCMOS電荷幫浦電路 …………………………………………………………… 36
3.6. 充電控制電路 …………………………………………………………… 44
3.7. 單級式運算放大器 …………………………………………………………… 46
3.8. 帶差參考電壓電路 …………………………………………………………… 47
3.9. 參考電流源電路 …………………………………………………………… 51
3.10. 電路設計考量 …………………………………………………………… 52

第四章 電路佈局、模擬結果與量測結果 …………………………………………………………… 54
4.1. 電路佈局 …………………………………………………………… 54
4.1. 低電壓獵能電路晶片佈局 …………………………………………………………… 55
4.2. 子電路模擬結果 …………………………………………………………… 62
4.3. 效率的定義與模擬數據整理 …………………………………………………………… 69
4.4. 量測規劃 …………………………………………………………… 73
4.5. PCB製作 …………………………………………………………… 74
4.6. 量測結果 …………………………………………………………… 75
4.7. 晶片問題與改善 …………………………………………………………… 83
4.8. 元件參數 …………………………………………………………… 85

第五章 結論與未來研究方向 …………………………………………………………… 86
5.1. 結論 …………………………………………………………… 86
5.2. 未來研究方向 …………………………………………………………… 87

參考文獻 …………………………………………………………… 88

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