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研究生:王韋程
研究生(外文):WANG, WEI-CHENG
論文名稱:孔隙介電層上之全程無電鍍鈷合金包覆銅導線研製
論文名稱(外文):Investigation of Co-Alloy Encapsulated Cu Wires Fabricated on Porous Dielectric Layers by Using All-Electroless Plating Processes
指導教授:陳錦山
指導教授(外文):CHEN, GIIN-SHAN
口試委員:陳錦山眭曉林鄭義榮
口試委員(外文):CHEN, GIIN-SHANSHUE, SHAU-LINCHENG, YI-JUNG
口試日期:2017-07-20
學位類別:碩士
校院名稱:逢甲大學
系所名稱:材料科學與工程學系
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:中文
論文頁數:123
中文關鍵詞:孔隙介電層自組裝單層無電鍍阻障層銅導線包覆層
外文關鍵詞:Porous Dielectric LayerSelf-Assembled MonolayerElectroless PlatingBarrier LayersCopper WiresCapping Layers
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現今積體電路元件尺度隨著半導體科技的進步而不斷微型化,故大幅提升元件內部密度及晶片性能是勢在必行的。目前半導體產業發展以金屬導線線寬縮減以及堆疊層增加的技術為重心,為了避免導線線寬縮減及長度增加造成的電子訊號延遲(RC Delay)的問題,使用高導電率的銅導線以及低介電常數的介電層材料是備受關注與研究的。
本論文採用奈米孔隙超低介電常數材料(Ultra Low k, ULK)─第三代黑鑽石(Black DiamondTM III, BD III)進行全程無電鍍銅導線的研製,利用下列技術:(1)表面羥基化改質、(2)自組裝單層(Self-Assembled Monolayer, SAM)披覆、(3)SAM表面官能基化與去質子化改質、(4)催化晶種固定、(5)無電鍍鈷合金阻障層沉積、(6)無電鍍銅導線填充,以及(7)無電鍍鈷合金包覆層析鍍將銅導線製作於介電層上。
首先透過介電特性(J-E、C-V)量測BD III表面經由SC-1化學溶液羥基化之漏電流及介電常數(k值)的變化,再由衰減式全反射傅立葉轉換紅外線光譜術(ATR-FTIR)評估BD III表面鍵結的變化以及羥基化效果,由分析結果得知:短秒數(10秒)的SC-1溶液改質不但對BD III能達到羥基化效果,亦不會造成嚴重的損害。
接著以上述羥基化條件後在BD III上進行十八烷基三氯矽烷自組裝單層(OTS-SAM)的披覆,生長完畢之表面呈現極疏水特性,經由輕微且短秒數真空電漿輻照的親水化處理,搭配SC-1化學溶液的去質子化效果,使表面呈現負電位而吸引金屬離子,並將金屬離子還原成催化晶種顆粒固定在OTS-SAM上,以利後續無電鍍鈷合金阻障層的沉積。
藉由鈷合金的自身催化效果,能夠輕易的以無電鍍方式填充銅導線。為了增加銅導線之可靠度,本研究採取無電鍍同質性金屬做為包覆層,亦即於銅導線上析鍍鈷合金包覆層。透過鈷合金鍍液中添加強還原劑,使鈷合金包覆層可以於銅導線上析出,達到完全包覆的效果。最後,以一固定電流應力分別施加於未包覆及有包覆鈷合金包覆層之銅導線上,量測其可靠度之差異。由量測結果證實,鈷合金包覆層確實可以延長銅的電致遷移壽命,大幅增加銅導線的可靠度。
Nowadays, the scales of integrated circuit along with advances in semiconductor technology and continuing to miniaturization, so it’s imperative to enhance the internal density and chip performance of the components. Recently, the development of the semiconductor industry is focused on reducing the width of metal wires and increasing stacking layers. In order to avoid the problem of RC delay caused by the reducing width and increasing length of the wires, it’s great concern and research on using high conductivity copper wires and low k dielectric layer materials.
In this study, we use nanoporous dielectric ultra low k (ULK) materials, named Black DiamondTM III (BD III) to fabricate copper wires by all-electroless plating. We use the techniques, such as: (1) Surface hydroxylation modified. (2) Self-Assembled Monolayer (SAM) deposition. (3) SAM surface functionalization and deprotonation. (4) Catalytic seed fixed. (5) Electroless deposition of Co-alloy barrier layers. (6) Electroless deposition of Cu wires and (7) Co-alloy capping layers deposition by electroless plating on dielectric layers.
First, the leakage currents and dielectric constants of the BD III surface hydroxylated by SC-1 solution were measured with the dielectric properties (J-E, C-V), and using attenuated total reflection Fourier transform infrared spectroscopy (ATR-FTIR) to evaluate the surface bonding changes and hydroxylation effects. According to the results, short-time (10 seconds) modification by SC-1 solution not only achieves hydroxylation effects on BD III, but also causes non-serious damage.
After hydroxylation treatment, octadecyltrichlorosilane self-assembled monolayer (OTS-SAM) is deposited on the BD III surface, and the surface is highly hydrophobic. A slight and short-seconds plasma treatment cause the surface becomes hydrophilic. Then, deprotonation by SC-1 solution makes the surface presents negative potential and attracts metal ions, and the metal ions are reduced to the catalytic seed particles fixed on the OTS-SAM for the subsequent electroless Co-alloy barrier layers deposition.
Electroless plating Cu wires can easily deposited on Co-alloy surface, according to Co-alloy self-catalytic effect. In order to increase the reliability of Cu wires, this study adopts electroless plating homogeneous metal as capping layers, that is, Cu wires are capped by Co-alloy capping layers. Adding the strong reducing agent into Co-alloy plating solution, Co-alloy capping layers can be precipitated on the Cu wires to achieve a completely capped effect. Finally, a constant current stress is applied to the Cu wires which are uncapped and capped by Co-alloy, to measure the difference in reliability. It is confirmed by the measurement results that Co-alloy capping layers can prolong the electromigration life of Cu and greatly increase the reliability of Cu wires.
摘要 I
Abstract III
目錄 V
圖目錄 VIII
表目錄 XIII
第一章 緒論 1
1.1 前言 1
1.2 研究動機與目的 2
第二章 文獻回顧 6
2.1 銅導線的發展與概況 6
2.1.1 銅導線的發展 6
2.1.2 低k介電層的發展 7
2.1.3 銅導線發展現況 9
2.2 銅與介電層整合議題 10
2.2.1 擴散阻障層的特性 10
2.2.2 擴散阻障層的種類 11
2.3 無電鍍技術 12
2.3.1 無電鍍基本原理 12
2.3.2 奈米催化晶種技術 14
2.3.3 無電鍍金屬擴散阻障層 16
2.5 無電鍍銅導線製程 17
2.6 銅導線包覆層的發展 19
第三章 實驗步驟與分析技術 27
3.1 實驗整體流程 27
3.2 個別步驟說明 28
3.2.1 p-SiOCH介電層試片製備 28
3.2.2 光阻溝槽試片製備 28
3.2.3 化學溶液羥基化 29
3.2.4 光阻圖案試片之溶液抵抗驗證 30
3.2.5 OTS-SAM生長 31
3.2.6 OTS-SAM表面改質及官能基化 31
3.2.7 光阻圖案試片之SAM生長驗證 31
3.2.8 催化晶種生長 32
3.2.9 無電鍍鈷合金阻障層與銅薄膜沉積 32
3.2.10 無電鍍鈷合金包覆層沉積 33
3.2.11 光阻溝槽導線填充 33
3.2.12 鈷合金包覆銅導線 34
3.3 儀器分析與量測原理說明 34
第四章 結果與討論 53
4.1介電層之最適化羥基化處理分析 53
4.1.1 水接觸角變化觀察 54
4.1.2 漏電流量測 54
4.1.3 C-V量測及k值換算 55
4.1.4 ATR-FTIR吸收光譜分析 56
4.2 OTS-SAM披覆、表面官能基化,以及晶種生長 58
4.2.1 p-SiOCH之矽烷化(Silylation)行為—OTS-SAM生長分析 58
4.2.2 OTS-SAM之表面官能基化、去質子化與晶種生長 60
4.3 無電鍍薄膜沉積 64
4.3.1 無電鍍鈷合金阻障層生長行為 64
4.3.2 無電鍍銅沉積 66
4.3.3 無電鍍鈷合金包覆層(Cap Layer)沉積 67
4.4 光阻溝槽導線製作與可靠度分析 70
4.4.1 光阻之化學溶液抵抗性驗證 70
4.4.2 光阻之OTS-SAM生長可行性驗證 72
4.4.3 無電鍍銅導線製程之各階段SEM橫截面觀察 72
4.4.4 無電鍍銅導線之SEM影像觀察及EDS成分分析 73
4.4.5 無電鍍銅導線之可靠度量測分析 74
第五章 結論 115
5.1 實驗結果 115
5.2 未來展望 116
參考文獻 117
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