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研究生:胡學儒
研究生(外文):Xue-Ru Hu
論文名稱:應用於K波段通訊系統之頻率合成器
論文名稱(外文):Frequency Synthesizer for K-band Communication Systems
指導教授:楊清淵楊清淵引用關係
口試委員:黃崇禧張智翔翁峻鴻
口試日期:2017-07-21
學位類別:碩士
校院名稱:國立中興大學
系所名稱:電機工程學系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:中文
論文頁數:65
中文關鍵詞:頻率合成器鎖相迴路三倍頻器K波段四相位振盪器
外文關鍵詞:Frequency SynthesizerPLLFrequency triplerK-bandQVCO
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隨著無線通訊系統蓬勃發展,射頻應用為了因應時代演進不斷的往高頻方向發展。無線系統對於振盪訊號的純淨度要求甚高,而鎖相迴路則可將振盪器的雜訊加以抑制,提供系統較好的相位雜訊。
本論文設計應用通訊系統之k波段頻率合成器,採用充電泵鎖相迴路來實現。由於在k波段屬於極高頻段,對於電壓控制振盪器來說寄生效應嚴重,以致於影響到輸出訊號的相位雜訊,所以本論文提出一個三倍頻電路來解決此問題,把原本應該設計於24GHz的振盪頻率降至8GHz來達到降低相位雜訊的目的。
採用 0.13μm 1P5M CMOS製程進行頻率合成器的設計、模擬和下線,其為工作頻率23.4-27.3GHz,消耗功率為77.64mw,操作電壓為1.2V。
Recently, the wireless communications are fast developing. In wireless communication systems, the high performance phase-locked loop (PLL) can provide a stable local oscillator (LO), exact frequencies, and channel switch function. In this case, the merger of a quadrature-voltage-controlled oscillator (QVCO) with a frequency tripler is designed for 24-GHz band.
This thesis presents a 24-GHz frequency synthesizer implemented with 0.13um CMOS technology. In order to produce high speed output, the frequency tripler using a sub-harmonic mixer is applied at the output stage of the oscillator. The QVCO provides the quadrature fundamental signals which are fed into the frequency tripler for frequency mixing.
誌謝 i
摘要 ii
Abstract iii
目錄 iv
圖目錄 vi
表目錄 ix
第一章 緒論 1
1.1 研究動機 1
1.2 K波段通訊系統簡介 2
1.3 論文概要 3
第二章 鎖相迴路 4
2.1 鎖相迴路基本原理 4
2.1.1 簡易式與充電式鎖相迴路 5
2.1.2 相位頻率檢測器 8
2.1.3 充電泵與迴路濾波器 10
2.1.4 電壓控制振盪器 13
2.2 頻率合成器特性分析 16
2.2.1 相位雜訊分析 16
2.2.2 參考頻率突波 19
2.3 振盪器架構與原理分析 21
2.3.1 振盪器之相位雜訊分析與抑制 22
2.3.2 四相位LC壓控振盪器 26
2.3.3 四相位壓控振盪器之相位訊與精準度分析 28
第三章 充電泵鎖相迴路系統設計與模擬 32
3.1 充電泵鎖相迴路系統分析 32
3.1.1 一階迴路濾波器 33
3.1.2 二階迴路濾波器 35
3.2 充電泵鎖相迴路系統模擬 38
第四章 次諧波混頻法三倍頻器之頻率合成器 41
4.1 簡介 41
4.2 系統架構 41
4.3 混頻器基本原理 42
4.4 內部電路架構 43
4.4.1 相位頻率檢測器 43
4.4.2 充電泵 45
4.4.3 迴路濾波器 46
4.4.4 電壓控制振盪器 47
4.4.5 除頻器 50
4.4.6 三倍頻器 53
4.5 電路模擬 55
4.6 晶片照相與電路佈局 58
4.7 文獻比較 59
4.8 量測環境考量 59
第五章 結論 61
參考文獻 62
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