臺灣博碩士論文加值系統

本篇論文使用銀燦科技所設計的IS917 USB3.0 NAND Flash Controller搭配上Intel所生產的L85C 20nm MLC PF2916B08LCMFP所組成的USB3.0隨身碟(USB3.0 Flash Drive, UFD)為實驗待測物，探討此高速隨身碟在兩層板的上的電磁干擾(Electromagnetic Interference, EMI)問題，並找出有效方法來抑制電磁干擾的產生。
改善的EMI設計並不是通用法則，其需要有完整的分析程序，並考慮每一個潛在的源頭與路徑且一個一個的解決。降低EMI最有效的方法便是控制信號的分佈路徑與其信號源頭，在現今的電子產品中其電磁干擾最主要是來自於IC中的同步切換雜訊(Simultaneous Switching Noise, SSN)，此雜訊電流能控制好且降低它的輻射能量，必能解決EMI問題。此論文針對EMI雜訊使用了去耦合電容(Decoupling Capacitor)與改善非理想電流迴路(Non-ideal Current Loop)，將832MHz與998MHz降低了24dB與5dB。

This thesis uses USB3.0 Flash Drive (UFD) as an experimental device. This device consists IS917 USB3.0 NAND Flash Controller from Innostor and L85C 20nm MLC PF2916B08LCMFP from Intel to research Electromagnetic Interference (EMI) issue on a 2 layers high speed UFD PCB and also find out the effective method to suppress the EMI noise.
There is no common technique to reduce EMI, the way to solve EMI needs a complete analysis procedure and also to consider each noise source and propagation path. The effective method to suppress EMI noise is to control noise source and path. Most of the EMI noises come from Simultaneous Switching Noise (SSN) in the ICs of electronic products at the present time. Controlling this noise current and reducing its radiated energy will overcome the EMI problem.
This thesis uses two techniques to reduce EMI noises. One is decoupling capacitor and the other one is improving non-ideal current loop, the final result suppresses 832MHz and 998MHz EMI noise to 24dB and 5dB.

中文摘要 ………………………………………………………………… i
Abstract ………………………………………………………………… ii
誌謝 ………………………………………………………………… iv
目錄 ………………………………………………………………… v
表目錄 ………………………………………………………………… vi
圖目錄 ………………………………………………………………… vii
一、緒論 ……………………………………………………………………… 1
1.1 簡介…………………………………………………………… 1
1.2 研究動機……………………………………………………… 1
1.3 章節介紹……………………………………………………… 2
二、理論基礎與工作原理 …………………………………………………… 3
2.1 USB3.0 基本介紹…………………………………………… 3
2.2 NAND Flash 基本介紹……………………………………… 8
2.3 USB3.0 NAND Flash Disk Controller………………………… 14
2.4 PCB疊構設計與阻抗計算…………………………………… 16
2.5 PCB Trace與電磁干擾的關係 ……………………………… 21
2.6 PDN與CMOS Switching Power Noise……………………… 23
2.7 旁路與去偶合電容…………………………………………… 25
2.8 EMC/EMI法規介紹與觀念…………………………………… 27
三、量測與實驗暨測試方法之結果與分析 ………………………………… 30
3.1 實驗待測物(DUT)介紹……………………………………… 30
3.2 PCB量測……………………………………………………… 32
3.2.1 USB 阻抗線量測……………………………………………… 32
3.2.2 USB3.0 電氣量測…………………………………………… 32
3.2.3 DDR166信號量測…………………………………………… 39
3.3 EMI量測……………………………………………………… 40
3.3.1 待測物裸板量測……………………………………………… 40
3.3.2 待測物加金屬外殼量測……………………………………… 41
3.3.3 EMI輻射源分析……………………………………………… 45
3.3.4 待測物EMI改善實驗與結果………………………………… 52
四、結論 ……………………………………………………………………… 59
參考文獻 ………………………………………………………………… 60

[1] Universal Serial Bus 3.0 Specification Revision 1.0, November 12, 2008.
[2] Universal Serial Bus Specification Revision 2.0, April 27, 2000.
[3] 陳俊甫,細說USB2.0&3.0技術演進及量測規範, www.ateams.com.tw.
[4] Design For EMI, Intel Application Note AP-589, February 1999.
[5] Rino Micheloni, Luca Crippa, and Alessia MarelliInside, Inside NAND Flash Memories, Springer, September 6, 2010.
[6] Intel 128M20C Enterprise Compute NAND Flash Memory datasheet.
[7] Open NAND Flash Interface Specification, Revision 3.2, www.onfi.org.
[8] Innostor IS917 Datasheet v1.00, www.innostor.com.
[9] Mark I. Montrose, Printed Circuit Board Design Techniques for EMC Compliance: A Handbook for Designers, Second Edition, Wiley-IEEE Press, June 2000.
[10] David M. Pozar, Microwave Engineering, 3/e, John Wiley & Sons, 2005.
[11] 林坤賢, "多層印刷電路板中佈線即過孔對EMI輻射的效應分析", 國立交通大學電信學程碩士論文, 2010.
[12] 謝勝旺, "高速IC電路板電磁干擾解決方案研究", 國立交通大學電信學程碩士論文, 2010.
[13] muRata_Application Manual for Power Supply Noise Suppression and Decoupling for Digital ICs, www.murata.com.
[14] Henry W. Ott, Electromagnetic Compatibility Engineering, Wiley, 2009.