臺灣博碩士論文加值系統

本論文針對返馳式架構之市電驅動LED燈之驅動器，進行改良與晶片實現，為了達到良好的隔離，並除去傳統光耦合器的缺點。本論文設計係用於返馳式LED設備的初級側輸出電流估算，原因是精確度是初級側輸出電流估算系統中最關鍵者。因此本論文提出的架構中，包含了二極體導通週期偵測電路及LED電流估算電路，前述二極體導通週期偵測電路負責偵測正確的二次側放電時間，而前述LED電流估算電路則鎖定初級側峰值電流，並產生正比於輸出電流的電壓。經量測結果證實LED電流估算電壓鎖定的最大誤差為10.28%。
另外，本論文進一步結合初級側輸出電流估算電路與準諧振邊界導通模式控制器，並整合在同一個晶片。準諧振模式最重要的是偵側波谷訊號，需要偵測輔助繞組電壓在二次側放電完畢震盪到第一個波谷的訊號，以供脈衝寬度調變(PWM)控制電路決定開關關閉的時間。然而波谷訊號非常容易誤判，本論文加入三項防誤判機制避免偵測錯誤，可避免交流電過零點時，能量太小無法耦合到二次側而造成無波谷訊號，開關再也無法啟動的問題。
本論文之LED驅動器輸出電壓可達到6~60 V，及4.2~42 W的輸出功率。而轉換器架構為單級的功率因數校正，並配合準諧振邊界導通模式控制器使用電壓隨耦控制法達到高功率因數，模擬結果功率因數達到0.991，總諧波失真為12.48%。

The main contribution of this thesis is aimed to the power efficiency enhancement of flyback-based LED drivers by using the proposed quasi-resonant flyback controller.
A primary side output current estimator for a flyback LED driver is firstly designed on silicon to achieve good isolation and avoid the shortcomings of using the traditional optocouplers. A LED current estimator and a diode conduction period detector are needed. The former samples and holds the primary side peak current to generate a voltage proportional to the LED current. The later is in charge of estimating the discharge time for the secondary side to prevent misjudgment of the period. The worst voltage locking error of LED current estimation is 10.28% by measurement.
Moreover, we then combine the primary side output current estimator with the quasi-resonant flyback converter to detect the valley signals of auxiliary winding voltage after the secondary-side discharge. This detected signal is for PWM (pulse width modulation) control circuit to determine the switch-off time of power MOSFET. However, the valley signal is very easy to be misjudged due to zero-crossing from AC power lines. Three anti-misjudge mechanisms are proposed to prevent such a problem. The key approach is to prevent the scenario that the energy is too small to be coupled to the secondary-side when the voltage of the AC power line crosses the zero and the switch is not turned on.
The output voltage range of the proposed driver is 6~60 V, and the output power is 4.2~42 W. The driver is basically a single-stage power factor correction. It combines the proposed quasi-resonant flyback controller with a voltage follower to achieve high power factor. The power factor is 0.991, while the total harmonic distortion is 12.48% by simulations.

論文審定書 i
論文摘要 iii
Abstract iv
目錄 v
圖目錄 ix
表目錄 xiv
1 研究背景與動機 1
1.1 前言 1
1.2 相關文獻與研究探討 5
1.2.1 隔離元件 5
1.2.2 柔性切換 9
1.3 研究動機 14
1.4 論文大綱 14
2 返馳式LED驅動器與初級側輸出電流估算電路 15
2.1 簡介 15
2.2 系統架構 15
2.3 返馳式轉換器設計 16
2.3.1 返馳式轉換器介紹 16
2.3.2 主動功因修正 22
2.4 初級側電流估算電路設計 29
2.4.1 二極體導通時間偵測電路設計 29
2.4.2 LED電流估算電路設計 31
2.5 電路模擬與預計規格 35
2.5.1 二極體導通時間偵測電路模擬 36
2.5.2 LED電流估算電路模擬 39
2.6 晶片實作與量測結果 44
2.6.1 返馳式轉換器系統量測結果 44
2.6.2 晶片量測結果 47
2.7 結果與討論 50
3 準諧振邊界導通模式之返馳式LED驅動器 51
3.1 簡介 51
3.2 系統架構 51
3.3 準諧振邊界導通模式之返馳式LED驅動器電路設計 53
3.3.1 波谷偵測電路設計 53
3.3.2 PWM 控制電路設計 57
3.3.3 補償電路設計 60
3.3.4 過電流保護電路設計 67
3.3.5 高壓緩衝器設計 68
3.4 電路模擬與預計規格 69
3.4.1 晶片佈局 69
3.4.2 波谷偵測電路模擬 70
3.4.3 PWM 控制電路模擬 72
3.4.4 補償電路模擬 73
3.4.5 過電流保護電路模擬 74
3.4.6 高壓緩衝器模擬 74
3.4.7 輸入LC濾波電路模擬 76
3.5 晶片實作與量測結果 77
3.5.1 晶片照相 77
3.5.2 晶片量測結果 78
3.6 結果與討論 80
4 結論與未來研究方向 81
4.1 研究成果與結論8 1
4.2 未來研究方向 82
參考文獻 85

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