臺灣博碩士論文加值系統

本文係針對高性能之覆晶陣列球柵封裝(HFCBGA)熱傳能力作分析，其中以熱阻值ΘJC作為一個判斷散熱能力好壞的指標，之間存在的熱界面材料佔據相當重要之地位，此材料的熱傳導係數、厚度、覆蓋率等議題皆對於封裝體熱傳影響甚鉅，目標期望使此封裝體的熱阻可以小於產品標準。
本文可以分成幾個部分：第一部份是透過熱傳導分析儀量測熱界面材料之熱傳導係數，接者機台校正後藉由多點換線量測不同位置的晶片溫度與金屬表面溫度，兩者之值與功率計算得到熱阻值ΘJC 。第二部分則是以實驗熱阻值與C-SAT掃描圖中的孔洞、脫層及熱界面材料分布位置為依據，使用FloTHERM熱傳分析軟體模擬各個位置的溫度，進而計算模擬熱阻，吻合並藉此建立本實驗數值模擬中的驗證模型。第三部分為以C-SAT掃描圖與驗證模型預測可靠度實驗-高溫儲存試驗(HTST)後200、500週期試片其各別之熱阻值，最後以熱阻實驗比對驗證。最後的部分以田口法與變異數分析，針對此封裝體之熱阻值ΘJC做最佳化分析，未來可以此為依據設計產品。
得到的數據確認本研究的實驗與模擬最高熱阻值誤差可達到5%以下，驗證後之模型可以再次使用在此相同結構之封裝體熱傳分析。田口法之最佳化分析，從散熱路徑上選出8個因子，並以L18(21×37)直交表配置因子模擬分析，搭配變異數分析ANOVA(ANalysis Of VAriance)結果顯示較高的晶片上熱界面材料之熱傳導係數、較大的晶片尺寸及較薄的晶片上熱界面材料厚度可較有效減少熱阻值ΘJC以提高HFCBGA封裝結構之散熱能力。最後透過最佳化設計後可使得封裝體的熱阻小於產品標準。期望本文可提供學術與產業界對於熱界面材料與HFCBGA封裝體熱傳能力之關係有更進一步的了解與分析方向。

The purpose of this study is to investigate the heat transfer ability of high-performance flip-chip ball grid array (HFCBGA) package. In this work, the value of junction-to-case thermal resistance (θJC) is the important index to judge thermal performance. In electronic package, thermal interface material(TIM) always plays an important role in thermal capability, and its thermal conductivity, thickness and coverage will be the dominant factors on heat transfer efficiency. Another objective is to make sure the value of thermal resistance lower than that of product standard.
This study can be divided into four parts：First of all, thermal conductivity of TIM was measured, then the different junction temperature and case temperature from different positions using multi-point measurement method after calibration were measured later. With the value of temperature and power, the θJC were calculated. Second part was to building a verified model using FloTHERM solfware to simulate the temperature of each position on chip according to the experimental value of θJC and voids、delamination and distribution of TIM in image of C-SAT. Third part is to focus on test samples after HTST for 200 and 500 cycles, both of the experimental θJC values of the samples should be close to simulated values by the verified model. Finally, Taguchi method and ANOVA were adopted to analyze each factor of θJC to obtain the possibly best design.
The deviation between measurement and simulation on the highest value of θJC was lower than 5%. Taguchi method L18(21×37) orthogonal array was used to simulate each combination with 8 factors, then using ANOVA to find out that the higher thermal conductivity of die-attach, larger die size and thinner die-attach were the efficient ways to make HFCBGA package of better thermal performance.

目錄
論文審定書 i
誌謝 ii
摘要 iii
Abstract iv
目錄 v
圖目錄 vii
表目錄 x
第一章 緒論 1
1-1 前言 1
1-2 封裝簡介 2
1-3 研究動機 3
1-4 文獻回顧 4
1-5 組織與章節 6
第二章 理論基礎 11
2-1 熱傳定義 11
2-2 熱阻基本定義 13
2-2-1 熱阻 θJA 14
2-2-2 熱阻 θJB 14
2-2-3 熱阻 θJC 15
2-2-4 接觸熱阻 16
2-3 田口實驗設計方法 16
2-3-1 田口方法介紹 16
2-3-2 變異數分析 17
第三章 實驗熱阻量測 21
3-1 測試試片 21
3-2 實驗方法與流程 21
3-2-1熱傳導係數量測 21
3-2-2 HFCBGA試片熱阻量測 22
3-2-3 HFCBGA試片校正 24
第四章 數值模擬分析 43
4-1 FloTHERM軟體簡介 44
4-2數值模型建立 45
4-2-1 HFCBGA模型結構 45
4-2-2 邊界條件 45
4-3模擬與實驗變因修正 46
4-4分析流程與參數規劃 47
4-4-1 目標函數選定 47
4-4-2 控制因子與水準數 47
4-4-3 訂定田口直交表 49
第五章 實驗量測與數值模擬結果 57
5-1 HFCBGA實驗量測結果 57
5-2 HFCBGA數值模擬結果 57
5-3田口方法結果分析統合 58
第六章 結果分析與討論 69
6-1 實驗與模擬結果差異分析 69
6-2田口方法與變異數結果分析統合 72
6-3 最佳控制因子對於熱傳之影響-最佳化設計 73
第七章 結論 79
參考文獻 81

參考文獻
[1]李輝煌，田口方法-田口設計的原理與實務，高立圖書有限公司，2011。
[2]Tomasz Fatat, Przemystaw Matkowski, Barotsz Ptatek, Felba Jan, Carl Zandén, Li-Lei Ye, and Johan Liu. "Investigation on Interaction between Indium Based Thermal Interface Material and Copper and Silicon Substrates", Paper presented at the 19th European Microelectronics and Packaging Conference (EMPC), Grenoble, France, 2013.
[3]C. P. Wong and Michelle M. Wong. "Recent Advances in Plastic Packaging of Flip-Chip and Multichip Modules (MCM) of Microelectronics", IEEE Transactions on Components and Packaging Technologies 22, no. 1, pp. 21-25, 1999.
[4]Darvin R. Edwards, Ming Hwang, and Bill Stearns. "Thermal Enhancement of Plastic IC Packages", IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A 18, no.1, pp.57-67, 1995.
[5]T. D. Yuan, Hsin-Yu Pan, and Yuan Li. "Thermal Interface Material (TIM) Design Guidance for Flip Chip BGA Package Thermal Performance", pp. 1, 2004.
[6]Chi-Tung Yeh, Wei-Chun Qiu, Jiao-Dong Ji, Ji-An Pan, Rong-Zheng Lin, Gong-Dun Ng, Chang-Fu Lin, Key Chung, and C.S Hsiao. "Advanced Nano-Ag Thermal Interface Material for High Thermal Flip Chip BGA", Paper presented at the 11th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2016.
[7]Ian Hu, Men-Kai Shih, and Golden Kao. "Performance and Reliability of Tim in High Power HFCBGA", Paper presented at the 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), pp. 21-23 Oct. 2015.
[8]Tong-Hong Wang, Hsuan-Yu Chen, Chang-Chi Lee, and Yi-Shao Lai. "High-Power-Used Thermal Gel Degradation Evaluation on Board-Level HFCBGA Subjected to Reliability Tests", Paper presented at the 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), pp. 21-23, Oct. 2009.
[9]Nokibul Islam, Seo-Won Lee, Miguel Jimarez, Joon-Yeob Lee, and Jesse Galloway. "TIM Degradation in Flip Chip Packages", Paper presented at the 11th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), 2008.
[10]Nokibul Islam, Seo-Won Lee, Yun-Hyeon Ka, Jin-Young Khim, and Jesse Galloway. "TIM Selection Methodology for High Power Flip Chip Packages", Paper presented at the IEEE 12th tersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, pp. 2-5, Jun. 2010.
[11]Arun Gowda, David Esler, Sandeep Tonapi, Kaustubh Nagarkar, and K. Srihari. "Voids in Thermal Interface Material Layers and Their Effect on Thermal Performance", Paper presented at the Proceedings of 6th Electronics Packaging Technology Conference (EPTC), pp. 8-10, Dec. 2004.
[12]H. Zhang, S. Li, H. Liu, J. Bunt, F. Pompeo, K. Sikka, K. C. Rivera, H. Longworth, and C. Lian. "Failure Analysis of Thermal Degradation of TIM During Power Cycling", Paper presented at the 14th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), pp. 27-30, May 2014.
[13]H. Oprins, V. Cherman, G. Van der Plas, F. Maggioni, J. De Vos, T. Wang, R. Daily, and E. Beyne. "Experimental Thermal Characterization and Thermal Model Validation of 3D Packages Using a Programmable Thermal Test Chip", Paper presented at the IEEE 65th Electronic Components and Technology Conference (ECTC), pp.26-29, May 2015.
[14]Cameron Nelson, Jesse Galloway, Christopher Henry, and William Kelley. "Thermal Performance of TIMs During Compressive and Tensile Stress States", Paper presented at the 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM), 2017.
[15]張平，李强，宣益民，界面接觸熱阻的研究進展，化工學報第63卷，第2期，pp. 35-49，2012。
[16]Tong-Hong Wang, Sara N. Paisner, Chang-Chi Lee, Susan Chen, and Yi-Shao Lai. "Effect of Surface Roughness of Silicon Die and Copper Heat Spreader on Thermal Performance of HFCBGA", Microelectronics Reliability 51, no. 8, pp. 1372-76, 2011.
[17]Robert C. Campbell, Stephen E. Smith, and Raymond L. Dietz. "Measurements of Adhesive Bondline Effective Thermal Conductivity and Thermal Resistance Using the Laser Flash Method", Paper presented at the IEEE 15th Semiconductor Thermal Measurement and Management Symposium, 1999.
[18]Robert C. Campbell, and Stephen E. Smith. "Flash Diffusivity Method: A Survey of Capabilities", Electronics Cooling, pp. 34-41, 2002.
[19]Anthony F. Black and Suresh V. Garimella. "Prediction of Thermal Contact Resistance", Electronics Cooling, Nov. 2003.
[20]李輝煌，田口方法-田口設計的原理與實務:高立圖書有限公司，2011。
[21]顏劭丞，晶圓級晶片尺寸封裝之熱循環負載可靠度分析，國立中山大學機械與機電工程研究所碩士論文，2016。
[22]JEDEC. "Test Boards for Area Array Surface Mount Package Thermal Measurements", In JESD51-9, 2000.
[23]TTC-1002_Application_Manual.
[24]Bernie Siegal and Jesse Galloway. "Thermal Test Chip Design and Performance Considerations", Paper presented at the IEEE 24th Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), 2008.
[25]Eason Chen, Jeng-Yuan Lai, Yu-Po Wang, and C. S. Hsiao. "Thermal Evaluations of FCBGA with Embedded Hot Spot Designs", Paper presented at the International Microsystems, Packaging, Assembly Conference (IMPACT), Taiwan, 2006.
[26]Sasanka L. Kanuparthi, Jesse E. Galloway, and Scott McCain. "Impact of Heatsink Attach Loading on Fcbga Package Thermal Performance", Paper presented at the IEEE 13th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), 2012.
[27]Jesse Galloway and Sasanka Kanuparthi. "BLT Control and Its Impact on FCBGA Thermal Performance", Paper presented at the 11th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), 2008.
[28]潘峻銳，封裝結構之尺寸與材料參數對熱傳效益之影響，國立中山大學機械與機電工程研究所碩士論文，2012。
[29]Tong-Hong Wang, Chang-Chi Lee, and Yi-Shao Lai. "Thermal Characteristics Evaluation for Board-Level High Performance Flip-Chip Package Equipped with Vapor Chamber as Heat Spreader", Microelectronic Engineering 87, no. 12, pp.2463-67, 2010.