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研究生:沈庚輝
研究生(外文):Shen, Keng-Hui
論文名稱:低電阻率自我對準金屬矽化物在矽晶與三五化合物半導體上之成長
論文名稱(外文):Enhanced Growth of Low-Resistivity Self-Aligned Metal Silicides on Silicon and III-V Compound Semiconductors
指導教授:陳力俊陳力俊引用關係
指導教授(外文):Chen, Lih-Juann
口試委員:鄭晃忠吳文偉呂明諺陳仕鴻
口試委員(外文):Cheng, Huang-ChungWu, Wen-WeiLu, Ming-YenChen, Szu-Hung
口試日期:2017-07-21
學位類別:博士
校院名稱:國立清華大學
系所名稱:材料科學工程學系
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:英文
論文頁數:103
中文關鍵詞:蕭特基能障自我對準金屬矽化物稀土砷化鎵金屬氧化物半導體場效電晶體
外文關鍵詞:Schottky barrierSelf-alignedSilicideRare earthGaAsMOSFET
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隨著電晶體尺寸縮小到納米尺度,將受到顯著的驅動電流降低的影響而造成遷移率降低和源極/漏極寄生電阻增加。面對未來的巨大挑戰是,當電晶體尺寸接近7奈米時從物理學極限和實際面考慮,Si電晶體的持續縮小將會變得越來越困難。

低電阻率自對準金屬的源極/汲極是解決上述所提及之源極/汲極工程問題的非常有希望的方法。因此,本論文著重於nMOSFET的源極/汲極工程,並提出了幾種可行的解決方案。首先,提出在p-Si(100)基板中使用稀土金屬限制結構調製電子蕭特基能障高度,並且優化的工藝參數實現了極低的電子蕭特基能障高度。 藉由在Yb和Ni層之間插入Ti擴散阻擋層,Yb原子被約束在特定的反應區域中與矽化反應生成矽化物。

其次,我們也證明RE金屬限制結構也可以成功應用於III-V(GaAs)基板。最後,對於GaAs及InGaAs基板使用Yb,Ni,Ge歐姆接觸金屬化的材料和電性進行了廣泛的探索,這對於III-V基板的nMOSFET性能改進是非常有益。
With transistor dimension shrinking into nanoscale regime, it suffers from significant drive current reduction, due to mobility degradation and source/drain parasitic resistance increase. The big challenge going forward is that continued scaling of Si transistors will be more and more difficult because of both fundamental limitations and practical considerations as the transistor dimension approach 7 nm.

Low-resistivity self-aligned metal source/drain is a very promising approach for solving these mentioned problems in source/drain engineering. Therefore, this thesis focuses on the source/drain engineering of nMOSFETs and several feasible solutions have been proposed. First, Ti is proposed to modulate the electron Schottky barrier height with RE metal confinement structure in p-Si (100) substrates, and extremely low electron SBH is achieved with optimized process parameters. By inserting a Ti diffusion barrier between Yb and Ni layers, the Yb atoms are constrained in a specified reaction region for silicidation.

Moreover, the Schottky barrier height modulations (ΔΦB) of the Yb-Ni-silicide diode using confinement structure are 0.02 and 0.025 eV at an annealing temperature of 500 and 600 oC, respectively. The feasibility of the confinement structure in nMOSFET application is also demonstrated in this work. Second, we have demonstrated that the RE metal confinement structure can also be successfully applied to the III-V (GaAs) substrate. Finally, the material and electrical properties of the Yb, Ni, Ge ohmic contact metallization for GaAs and InGaAs substrate have been extensively explored, which is very beneficial for the performance improvement on III–V n-MOSFETs.
Abstract
Contents
Acknowledgments
List of Abbreviations and Acronyms
List of Figures
List of Tables

PART I. INTRODUCTION
CHAPTER 1. INTRODUCTION 1
1.1 An Overview of Semiconductor Device 1
1.2 Application of Silicides 10
1.3 Formation of Silicides 19
1.3.1 First Nucleated Phase 19
1.3.2 Phase Formation Sequence 20
1.3.3 Growth Kinetics and Thermodynamics of Silicides 24
1.4 Application of Germanides 26
1.4.1 Contact Materials to Ge and III–V Compounds 26
1.5 Formation of Nickel-Germanide Alloy 29
1.5.1 Solid-State Reaction 29
1.5.2 Catalytic Solid−Vapor Reaction 30
1.6 Rare Earth Silicides 34
References 36

PART II. EXPERIMENTAL PROCEDURES
CHAPTER 2. EXPERIMENTAL PROCEDURES 44
2.1 Substrate Preparation 44
2.2 Thin Metal Film Deposition 45
2.3 Rapid Thermal Annealing 46
2.3.1 Yb confinement structure for p-type Si (100) substrates 46
2.3.2 Yb and NiGe ohmic contact metallization for p-type GaAs (100) substrates 46
2.4 Selective Etching 47
2.5 Sample Preparation for Transmission Electron Microscope (TEM) Observation 47
2.5.1 Plan-view Specimen Preparation 47
2.5.2 Cross-Sectional Specimen Preparation 48
2.5.3 Precision Cross-sectional Specimen Preparation 50
2.6 Transmission Electron Microscope Observation 52
2.7 Energy Dispersive X-ray Spectroscopy (EDS) Analysis 52
2.8 Glancing Incidence X-Ray Diffraction Analysis(GIXRD) 53
2.9 Current-Voltage (I-V) Measurement 54
2.10 Scanning Electron Microscope (SEM) Observation 56
2.11 Auger Electron Spectroscopy 56
Reference 58

PART III. RESULTS AND DISCUSSION
CHAPTER 3. EFFECTIVE SCHOTTKY BARRIER LOWERING OF NI SILICIDE/P-SI(100) USING A YTTERBIUM CONFINEMENT STRUCTURE FOR HIGH PERFORMANCE N-TYPE MOSFETS 59
3.1 Motivation 59
3.2 Experimental Procedures 60
3.3 Results and Discussion 63
References 77

CHAPTER 4. LOW-RESISTIVITY OHMIC CONTACT FOR III-V COMPOUND SEMICONDUCTOR 80
4.1 Motivation 80
4.2 Experimental Procedures 84
4.3 Results and Discussion 87
References 95

PART IV. CONCLUSIONS AND FUTURE PROSPECTS
CHAPTER 5. SUMMARY AND CONCLUSIONS 100
5.1 Effective Schottky Barrier Lowering of Ni Silicide/p-Si(100) Using a Ytterbium Confinement Structure for High Performance n-type MOSFETs 100
5.2 Low-Resistivity Ohmic Contact For III-V Compound Semiconductor 101
CHAPTER 6. FUTURE PROSPECTS 102
6.1.1 Self-Aligned Contacts for III-V p-MOSFETs 102
6.1.2 Self-Aligned Contact Metallization for III–V FinFETs 102
6.1.3 Reliability Study for Si and III-V MOSFETs 103
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