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研究生:宋裕民
研究生(外文):Sung, Yu Min
論文名稱:在面積或邊緣限制下佈局圖案分群的優化
論文名稱(外文):On Optimizing Layout Pattern Classification under Area or Edge Constraint
指導教授:王廷基
指導教授(外文):Wang, Ting Chi
口試委員:麥偉基何宗易
口試日期:2016-12-30
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2016
畢業學年度:105
語文別:英文
論文頁數:51
中文關鍵詞:佈局圖案分群超大型積體電路設計電子設計自動化
外文關鍵詞:layout pattern classificationVLSI designelectronic design automation (EDA)
相關次數:
  • 被引用被引用:0
  • 點閱點閱:184
  • 評分評分:
  • 下載下載:11
  • 收藏至我的研究室書目清單書目收藏:0
在本篇論文中,我們探討兩個有清楚定義的佈局圖案分群問題,一個考慮面積比對限制,另一個考慮邊緣位移限制。給定一個電路佈局和一群標記,我們所探討的佈局圖案分群問題要求根據每個標記找出一個佈局片段,且在不違反面積比對或邊緣位移的限制下,將這些佈局片段分群,目標是分出來的群數越小越好且最大群中的佈局片段個數越多越好,其中面積比對限制或是邊緣位移限制是判斷佈局片段彼此間是否相似而能分在同一群的依據。我們將問題轉換成圖的問題(也就是一個限制型最小控制集問題)並且使用以整數線性規劃為基礎的方法來解決。同時也提供佈局片段合併技術以降低圖的大小,並加速我們的演算法。實驗數據顯示我們的演算法具有很好的效益。
In this thesis, we study two layout pattern classification problems respectively subject to an area match constraint and an edge displacement constraint. Given a circuit layout and a set of markers, each problem asks to identify a layout clip around each marker and divide the set of layout clips into disjoint clusters such that without violating a given area match constraint or edge displacement constraint, the
resultant number of clusters is as small as possible and the maximum cluster size is as large as possible. Either area match constraint or edge displacement constraint is used to well capture the similarity relations between clips and to group similar clips into a cluster. We model each problem as a graph problem (i.e., a constrained minimum dominating set problem) and solve it by an integer linear programming
based method. A clip merging technique for graph size reduction is also presented to accelerate our algorithms. The efficacy of our algorithms is well supported by encouraging experimental results.
1 Introduction 2
2 Preliminaries and Problem Formulations 5
2.1 Preliminaries 5
2.2 Problem Formulations 7
3 ACC Algorithm 9
3.1 Algorithm Overview 9
3.2 Clip Generation 9
3.3 Clip Merging 10
3.4 Similarity Graph Construction for ACC 13
3.5 Representative Clip Selection and Cluster Creation for ACC 14
4 ECC Algorithm 23
4.1 Algorithm Overview 23
4.2 Similarity Graph Construction for ECC 23
4.3 Representative Clip Selection and Cluster Creation for ECC 30
5 Experimental Results 33
6 Conclusion and Future Work 40
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[11] Y.-T. Yu, Y.-C. Chen, S. Sinha, I. H.-R. Jiang, and C. Chiang, "Accurate process-hotspot detection using critical design rule extraction," in Proceedings of DAC, pp. 1163-1168, 2012.
[12] Y.-T. Yu, I. H.-R. Jiang, Y. Zhang and C. Chiang, "DRC-based hotspot detection considering edge tolerance and incomplete specification," in Proceedings of ICCAD, pp. 101-107, 2014.
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[17] P.-H. Wu, C.-W. Chen, C.-R. Wu, and T.-Y. Ho, "Triangle-based process hotspot classication with dummication in EUVL," in Proceedings of VLSI-DAT, pp. 1-4, 2014.
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