|
[1] Y.-C. Lai, F. E. Gennari, M. W. Moskewicz, J. Lei, and W. Lai, "Method and system for performing pattern classication of patterns in integrated circuit designs," US8,079,005, 2011. [2] ICCAD 2016 Contest Website. http://cad-contest-2016.el.cycu.edu.tw/Problem_C/default.html. [3] R. O. Topaloglu, "Cad contest in pattern classification for integrated circuit design space analysis and benchmark suite," in Proceedings of ICCAD, 2016. [4] J.-Y.Wuu, F. Pikus, A. Torres, and M. Marek-Sadowska, "Rapid layout pattern classification," in Proceedings of ASP-DAC, pp. 781-786, 2011. [5] Y.-T. Yu, G.-H. Lin, I. H.-R. Jiang, and C. Chiang, "Machine-learning-based hotspot detection using topological classification and critical feature extraction," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 3, pp. 460-470, 2015. [6] J. Guo, F. Yang, S. Sinha, C. Chiang, and X. Zeng, "Improved tangent space based distance metric for accurate lithographic hotspot classification," in Proceedings of DAC, pp. 1169-1174, 2012. [7] N. Ma, J. Ghan, S. Mishra, C. Spanos, and K. Poolla, "Automatic hotspot classification using pattern-based clustering," in Proceedings of SPIE, vol. 6925, pp. 692505-1-692505-10, 2008. [8] V. Dai, Y.-C. Lai, F. Gennari, E. Teoh, and L. Capodieci, "Systematic physical verification with topological patterns," in Proceedings of SPIE, vol. 9053, pp. 905304-1-905304-10, 2014. [9] E. Teoh, V. Dai, L. Capodieci, Y.-C. Lai, and F. Gennari, "Systematic data mining using a pattern database to accelerate yield ramp," in Proceedings of SPIE, vol. 9053, pp. 905306-1-905306-13, 2014. [10] J. P. Cain, Y.-C. Lai, F. Gennari, and J. Sweis, "Methodology for analyzing and quantifying design style changes and complexity using topological patterns," in Proceedings of SPIE, vol. 9781, pp. 978108-1-978108-13, 2016. [11] Y.-T. Yu, Y.-C. Chen, S. Sinha, I. H.-R. Jiang, and C. Chiang, "Accurate process-hotspot detection using critical design rule extraction," in Proceedings of DAC, pp. 1163-1168, 2012. [12] Y.-T. Yu, I. H.-R. Jiang, Y. Zhang and C. Chiang, "DRC-based hotspot detection considering edge tolerance and incomplete specification," in Proceedings of ICCAD, pp. 101-107, 2014. [13] A. B. Kahng, C.-H. Park, and X. Xu, "Fast dual-graph-based hotspot filtering," in Proceedings of SPIE, vol. 27, pp. 1635-1642, 2006. [14] J. W. Park, R. Todd, and X. Song, "Geometric pattern match using edge driven dissected rectangles and vector space," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 12, pp. 2046-2055, 2016. [15] C. C. Chang, I. C. Shih, J. Lin, Y. Yen, C. Lai, W. Huang, R. Liu, and Y. Ku, "Layout patterning check for DFM," in Proceedings of SPIE, vol. 6925, pp. 69251R-1-6925R-7, 2008. [16] J. Xu, K. Krishnamoorthy, E. Teoh, V. Dai, and L. Capodieci, "Design layout analysis and DFM optimization using topological patterns," in Proceedings of SPIE, vol. 9427, pp. 94270Q-1-94270Q-11, 2015. [17] P.-H. Wu, C.-W. Chen, C.-R. Wu, and T.-Y. Ho, "Triangle-based process hotspot classication with dummication in EUVL," in Proceedings of VLSI-DAT, pp. 1-4, 2014. [18] S. Wagner and D. Wagner, Comparing Clusterings - An Overview. http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.164.6189, 2007. [19] Clipper - an Open source freeware library for clipping and offsetting lines and polygons. http://www.angusj.com/delphi/clipper.php. [20] T. Kloks and Y.-L. Wang, Advances in Graph Algorithms, pp. 17-21. http://vixra.org/abs/1409.0165, 2013.
|