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研究生:賴勇安
研究生(外文):Lai, Yung-An
論文名稱:用於臨界值邏輯電路之保證錯誤率的近似邏輯合成方法
論文名稱(外文):Synthesis of Approximate Threshold Logic Circuits with an Error Rate Guarantee
指導教授:王俊堯王俊堯引用關係
指導教授(外文):Wang, Chun-Yao
口試委員:黃俊達劉建男
口試委員(外文):Huang, Juinn-DarLiu, Chien-Nan
口試日期:2017-07-24
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:英文
論文頁數:27
中文關鍵詞:臨界值邏輯近似運算近似邏輯合成
外文關鍵詞:Threshold LogicApproximate computingApproximate logic synthesis
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  • 被引用被引用:0
  • 點閱點閱:108
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近年來,臨界邏輯因為其實體實現的進展以及其和類神經網路的高度關連,吸引
許多研究的關注。另一方面,近似運算為針對可容忍錯誤之應用的新設計範例,
這類的應用如機器學習、形態辨識. . . . . .等。我們將於此論文提出結合臨界邏輯與近似運算的合成演算法,透過我們提出的演算法,我們可以在保證錯誤率的限
制下,得到具成本效益的近似臨界邏輯電路。我們在IWLS2005的電路上進行實
驗,實驗結果顯示我們提出的演算法能有效的探索給定之臨界邏輯電路的可近似
性。以5%的錯誤率為例,臨界邏輯電路成本平均可得到22.8%的改善。
Recently, threshold logic attracts a lot of attention due to the advances of its physical implementation and the strong binding to neural networks.On the other hand, approximate computing is a new design paradigm that focuses on error-tolerant applications, e.g., machine learning or pattern recognition.In this thesis, we integrate threshold logic with approximate computing and propose a synthesis algorithm to obtain cost-efficient approximate threshold logic circuits with an error rate guarantee.We conduct experiments on a set of IWLS 2005 benchmarks.The experimental results show that the proposed algorithm can efficiently explore the approximability of each benchmark.For a 5\% error rate constraint, the circuit cost can be reduced by 22.8\% on average.
1 Introduction 1
2 Preliminaries 3
2.1 LTG and threshold function . . 3
2.2 Positive-negative weight transformation . . 4
2.3 Critical-Eect Vector . . 4
2.4 Hybrid cost function of LTG networks . . 5
3 Proposed Method 7
3.1 Error rate computation . . 7
3.2 Approximate operations . . 8
3.3 LTG and approximate operation candidate selection . . 9
3.4 Error rate estimation after approximation . . 10
3.5 Approximation heuristic . . 14
3.6 Redundancy removal . . 16
3.7 Overall flow .. 17
4 Experimental results 19
5 Conclusion 22
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