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研究生:陳冠華
研究生(外文):Chen, Kuan-Hua
論文名稱:利用Ge離子佈植改善4H-SiC金氧半場效電晶體特性
論文名稱(外文):Improving 4H-SiC MOSFET Characteristics by Germanium Ion Implantation
指導教授:黃智方
指導教授(外文):Huang, Chih-Fang
口試委員:吳添立李坤彥
口試委員(外文):Wu, Tian-li
口試日期:2017-04-14
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:中文
論文頁數:49
中文關鍵詞:4H-碳化矽離子佈植通道遷移率
外文關鍵詞:4H-SiCGeion-implantationMobility
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在文獻中矽-鍺通道n-type金氧半場效電晶體的電子通道遷移率已經被證明提升10-20%。基於矽與碳化矽基板都可以離子佈植方式摻雜鍺離子來改善電性的事實上。本篇論文中,我們提出在有別於常見氧化後退火的方法,而使用鍺離子佈植來提升碳化矽金氧半場效電晶體的電子通道遷移率。
將原本用於源極、汲極、基極的磷離子和鋁離子劑量提升至1016cm-2之後,從此次實驗結果中,n-type和p-type的接觸電阻率獲得改善。而在Ge離子佈植方面,將探索不同劑量跟電性活化溫度,結果發現,低劑量的鍺離子佈植的SiC MOSFET,最大電流密度5.76x10-2A/mm,低導通電阻11.42‧mΩcm2,電子通道遷移率22.74cm2/V-s,主要歸因於碳化矽含Ge可提高電子遷移率的關係。最重要的是,相較於高劑量的Ge離子佈植,低劑量的Ge離子佈植的SiC MOSFET表面粗糙散射可以有效改善使影響降至最低,而且電子通道遷移率可以達到氧化後氮化氣體退火類似的效果。
In the literature Si-Ge channel n-type MOSFET has been proven being able to enhance 10-20% electron channel mobility. Based on the fact that Ge implantation in Si or SiC substrate was feasible, in this study we propose to use Ge ion implantation to promote electron channel mobility in SiC MOSFETs without post oxidation annealing. The implanted doses of phosphorus and aluminum for the source, drain, and body were above 1016 cm-2. From the experimental results, the n-type and p-type contact resistivities were improved. For the Ge ion implantation, effects from different implantation doses and electrical activation temperatures were investigated. From the results, SiC MOSFETs with low dose Ge implantation showed a maximum drain current density of 5.76x10-2A/mm, a low on-resistance of 11.42mΩ•cm2, and a channel mobility of 22.74cm2/V-s. It is attributed to the high electron mobility of Ge. The most important of all, compared with high dose Ge implantation, surface roughness scattering is reduced to a minimal level, and the electron channel mobility can be improved to a level comparable with those observed with post oxidation annealing in nitrogen-based gas.
中文摘要.............................................................................................. I
Abstract ............................................................................................... II
目錄 ...................................................................................................III
圖目錄 .............................................................................................. VI 表目錄 .............................................................................................. IX
第一章 序論 ....................................................................................... 1
1.1 寬能隙材料 4H-碳化矽 (4H-SiC)…………………1
1.2 碳化矽晶格結構 ........................................................ 2
1.3 水平式金氧半 水平式金氧半 場效應 場效應 電晶體 電晶體 (Laterl MOSFET) .......... 3
1.4 文獻回顧 ................................................................... 3
1.4.1 鍺(Ge)離子佈植在Si基板的研究…...….....................3
1.4.2 Ge 離子佈植在SiC基板的研究…...…...……….…...4
1.4.3 改善源極、汲極、基極的離子佈植研究…......…......4
1.5 研究動機及論文大綱 研究動機及論文大綱 研究動機及論文大綱 .............................................. .5
第二章 元件設計................................................................................ 8
2.1 水平型 MOSFET元件設計 ...................................... 8
2.2 試片分類 ................................................................... 8
IV
2.3 光罩設計 ................................................................... 9
2.4 Ge 離子佈植模擬 .................................................... 9
2.5 基極離子佈植………………………………………...10
2.6 源極及汲極離子佈植………………………………...10
2.7 氧化製程……………………………………………...11
第三章 製程實驗...............................................................................19
3.1 一般清潔 ..................................................................19
3.2 Ge離子佈植…………………………………………19
3.3 基極區域離子佈植………………………………. ...19
3.4 源極及汲極區域離子佈植…......…...………………20
3.5 電性活化 ................................................................21
3.6 閘極氧化層 ............................................................21
3.7 源極、汲極歐姆接觸..............................................21
3.8 基極歐姆接觸 .........................................................22
3.9 快速熱退火 ............................................................22
3.10 閘極金屬和墊金屬…......…...………………………22
第四章 實驗量測結果與討論 實驗量測結果與討論 實驗量測結果與討論 實驗量測結果與討論 ............................................................28
4.1 測試元件TLM特性 ...............................................28
4.2 MOSFET 電流 -電壓量測分析 電壓量測分析 ................................29
V
4.2.1 轉導增益(Transconductance)與臨界電壓(Threshold Voltage)…......………………………………....... 29
4.2.2 電子通道遷移率…...…...…………………...……...30
4.2.3 ID-VDS曲線分析…...……...…......….......................30
4.3 溫度效應探討 溫度效應探討 .......................................................31
第五章 結論與未來發展 結論與未來發展 結論與未來發展 ...................................................................46
參考文獻 ............................................................................................47
[1] Liu, G., Tuttle, B. R., and Dhar, S "Silicon carbide: a unique platform for metal-oxide-semiconductor physics." Applied Physics Reviews 2.2 (2015): 021307.
[2] Powell, A. R., and Rowland, L. B. "SiC materials-progress, status, and potential roadblocks." Proceedings of the IEEE 90.6 (2002): 942-955.
[3] Selvakumar, C. R., and Hecht, B. "SiGe-channel n-MOSFET by germanium implantation." IEEE Electron Device Letters 12.8 (1991): 444-446.
[4] Duguay, S., et al. "Structural and electrical properties of Ge nanocrystals embedded in SiO2 by ion implantation and annealing." Journal of Applied Physics 97.10 (2005): 104330.
[5] Katulka, G., et al. "Electrical and optical properties of Ge–implanted 4H–SiC." Applied Physics Letters 74.4 (1999): 540-542.
[6] Dashiell, M. W., et al. "Pseudomorphic SiC alloys formed by Ge ion implantation." Applied Physics Letters 85.12 (2004): 2253-2255.
[7] Roe, K. J., et al. "Ge incorporation in SiC and the effects on device performance." High Performance Devices, 2002. Proceedings. IEEE Lester Eastman Conference on. IEEE, 2002.
[8] Roe, K. J., et al. "Silicon carbide and silicon carbide: germanium heterostructure bipolar transistors." Applied Physics Letters 78.14 (2001): 2073-2075.
[9] Katulka, G., et al. "A technique to reduce the contact resistance to 4H-silicon carbide using germanium implantation." Journal of Electronic Materials 31.5 (2002): 346-350.
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[10] Guo, H., et al. "The intermediate semiconductor layer for the ohmic contact to silicon carbide by Germanium implantation." Junction Technology, 2008. IWJT'08. Extended Abstracts-2008 8th International workshop on. IEEE, 2008.
[11] Chen, Z. W., Lv, M. Y. , and Liu, R. P. "Stability and electronic structure of ordered Si 0.75 Ge 0.25 C alloy." Journal of Applied Physics 98 (2005): 096105.
[12] Salinaro, A., et al. "MOS interface characteristics of in situ Ge-doped 4H-SiC homoepitaxial layers." Materials Science Forum. Vol. 821. Trans Tech Publications, 2015.
[13] Kimoto, T., et al. "Ion implantation technology in SiC for high-voltage/high-temperature devices." Junction Technology (IWJT), 2016 16th International Workshop on. IEEE, 2016.
[14] Negoro, Y., et al. "Electrical activation of high-concentration aluminum implanted in 4H-SiC." Journal of Applied Physics 96.9 (2004): 4916-4922.
[15] Negoro, Y., et al. "Electronic behaviors of high-dose phosphorus-ion implanted 4H–SiC (0001)." Journal of Applied Physics 96.1 (2004): 224-228.
[16] Kita, K., et al. "Control of 4H-SiC (0001) thermal oxidation process for reduction of interface state density." ECS Transactions 64.8 (2014): 23-28.
[17] Kurimoto, H., et al. "Thermal oxidation temperature dependence of 4H-SiC MOS interface." Applied Surface Science 253.5 (2006): 2416-2420.
[18] Kikuchi, R. H., and Kita, K. "Interface-reaction-limited growth of thermal oxides on 4H-SiC (0001) in nanometer-thick region." Applied Physics Letters 104.5 (2014).
[19] Chen, C.W., et a1. "Silicon on insulator analysis and application." Minghsin Journal 32 (2006).
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