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研究生:丁奕如
研究生(外文):Yi-Ju Ting
論文名稱:特殊應用積體電路之良率與最佳品管架構分析
論文名稱(外文):Defect Rate Analysis for the Optimal Quality Control Scheme of Application Specific IC
指導教授:吳政鴻吳政鴻引用關係
口試日期:2017-07-03
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:工業工程學研究所
學門:工程學門
學類:工業工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:中文
論文頁數:70
中文關鍵詞:相關性分析假設檢定二項式分配不良率分析自迴歸移動平均模型統計品質管制
外文關鍵詞:Correlation AnalysisTest for HomogeneityBinomial DistributionDefect Rate AnalysisAutoregressive Integrated Moving Average (ARIMA) ModelStatistical Quality Control
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  過去半導體科技產品製造廠商IC不良率品質管制之方法,但多在產品已有實質產出後,觀察產出之不良率異常波動,事後以較被動之手法進行品質管制。本研究之目標以在IC未有實際產出資料前,使用代表IC與其成品物理特性的物理性表徵因子,包含IC與成品的外觀、可耐溫度等性質為解釋變數,預測IC應有之穩定長期不良率;對於品質之動態管制,亦以時間序列分析在實際批量產出前,預先預測批量不良率,在產品產出前預先進行管制。
  本研究以特殊應用積體電路(ASIC)2015年至2016年,兩年內之不良率歷史資料為例,分四階段進行研究分析:首先以IC的物理性表徵因子為解釋變數,預測IC兩年長期穩定不良率;接著針對批量間不良率之穩定性進行檢定,研究發現有八成的ASIC不論是原始批次IC不良率,或累積批次到固定批量後的IC不良率,皆不穩定、不符合相同二項式分配,批次間不良率有相關性,不適合使用傳統之不良率管制圖;故最後本研究針對批量IC不良率有時間相關性的ASIC,以批量不良率歷史時間序列,建構自迴歸移動平均模型(ARIMA model)預測下一批量IC之不良率,並根據建構出之模型,以時間序列統計管制圖進行品質管制。
  根據本研究之模型結果,特定單一IC可以依據製程相關因子1與設計相關因子3預測其長期不良率,且模型的解釋力最高達60%。另外亦有一半以上的ASIC可以使用歷史批量不良率資料預測下一批量不良率,並根據預測值進行更主動的動態品質管制,以此取代傳統品質管制方法需被動等待生產異常出現的缺點。另外此方法可以排除趨勢性的不良率變動,因此可以真正動態找出品質異常的批次。
This research studies the quality of Application Specific Integrated Circuit (ASIC) using historical defective data from 2015 to 2016 provided by a leading ASIC manufacturing company. Conventionally, IC makers adopt Statistical Process Control methods passively for monitoring the defect rate of their IC products. The objective of this study is to use physical characterization factors of the components, which are usually known in the design phase, to predict the long-term defect rates before the actual production data can be collected. The physical characterization factors include the appearance of the component, temperature tolerance, and packaging types.
This research is conducted in four stages. First, the physical characterization factors of IC are used to predict the long-term system assembly component defect rate (known as DPPM) across different ASIC’s. Then, we test the stationarity of the DPPM of one ASIC between its shipping lots. To make the test trustworthy, we accumulate the usage number from consecutive lots up to 10000 to become one batch. As a result, batch-to-batch (the batches sorted by manufacturing time) behavior of more than 80% of the ASIC’s does not follow identical binomial distributions. It means that most of the ASIC’s do not have a stationary DPPM distribution between either lots or batches. As a consequence, there shall exist auto-correlations of the DPPM from consecutive lots. Thus, traditional SPC methods will not be able to perform well in terms of catching the anomalies. In order to catch the auto-correlated behavior, Autoregressive Integrated Moving Average (ARIMA) models are built and analyzed to study the DPPM trends of individual ASIC. Finally, time-series quality control charts are constructed and monitored based on the best-fit ARIMA models.
With the four-stage analysis proposed in this thesis, we are able to provide the guidelines on the observable characteristics of the ASIC’s in order to apply different control and monitoring schemes. Based on our study results, specific single components will be predicting their long-term DPPM according to their process factor 1 and design factor 3, and the power of this predictive model up to 60%. Moreover, half of the ASIC can also use the historical production data to predict batch DPPM in the future. The abnormal points can literally be found after trendy DPPM changes were eliminated. Consequently, we can replace the traditional quality management and make a more active dynamic quality control.
口試委員會審定書 i
致謝 ii
中文摘要 iii
ABSTRACT iv
表目錄 1
圖目錄 2
第一章 緒論 4
1.1 研究背景與動機 4
1.1.1 半導體元件不良率 4
1.1.2 產品製程參數與整合組裝IC不良率的相關性 5
1.1.3 現階段動態品質管制方法 6
1.1.4 ARIMA預測模型 7
1.1.5 研究動機總結 8
1.2 研究目的 8
1.3 研究方法與流程 10
第二章 文獻回顧 13
2.1 半導體產品不良率預測相關研究 13
2.1.1 簡單線性迴歸模型 13
2.1.2 決定係數 14
2.2 相關性分析與迴歸模型配適方法之相關研究 14
2.2.1 皮爾森相關係數 15
2.2.2 組內相關係數 15
2.2.3 迴歸樹 16
2.3 二項式分配檢定方法相關研究 16
2.3.1 卡方配適性檢定 17
2.4 時間序列分析預測與品質管制相關研究 18
2.4.1 自迴歸移動平均模型 19
2.4.2 管制圖 20
第三章 問題描述與研究方法 22
3.1 問題架構 22
3.2 資料來源與問題假設 23
3.2.1 資料來源 23
3.2.2 問題假設 27
3.3 變數定義 27
3.3.1 品質特徵值(DPPM) 27
3.3.2 物理性表徵因子 28
3.3.3 批次不良率 28
3.4 研究方法與流程 29
第四章 統計分析檢定與模型建立 31
4.1 整合組裝IC不良率之長期配適值 31
4.1.1 數值因子選取 31
4.1.2 類別因子選取 35
4.1.3 交叉分析 38
4.1.4 整合組裝IC不良率長期配適模型 46
4.2 整合組裝IC批量不良率穩定性檢定 48
4.2.1 IC批次整合組裝IC不良率(Lot-to-Lot DPPM) 48
4.2.2 IC批量整合組裝IC不良率(Batch-to-Batch DPPM) 50
4.3 IC批量不良率時間序列分析與預測 55
4.3.1 IC逐批不良率預測方法與步驟 55
4.3.2 ASIC逐批動態預測 56
4.3.3 IC逐批不良率預測效果 59
4.4 根據時間序列預測之品質管制 63
4.4.1 IC逐批品質異常管制圖:動態預測值 63
4.4.2 IC逐批特殊製程異常管制圖:預測殘差值 64
第五章 結論與未來研究方向 68
5.1 結論 68
5.2 未來研究方向 68
參考文獻 69
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