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研究生:張芸瑄
研究生(外文):Yun-Hsuan Chang
論文名稱:發光電晶體溫度機制分析與光邏輯閘之應用
論文名稱(外文):Investigations of Temperature Dependent Charge Control Model and Electrical-Optical Logic Applications for Light Emitting Transistor
指導教授:吳肇欣
指導教授(外文):Chao-Hsin Wu
口試日期:2017-07-20
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:光電工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:105
語文別:英文
論文頁數:80
中文關鍵詞:發光電晶體量子阱捕捉逃脫電流溫度增益效應光電晶體光響應度邏輯電路光電積體電路整合
外文關鍵詞:Light-Emitting TransistorsCarrier Captured-EscapedTemperature Dependent Charge Control ModelPhototransistorResponsivityLogic GateOptical Logic Circuit
相關次數:
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本篇論文分為兩部份探討,發光電晶體對溫度感測特性分析與光電積體電路的整合運用。於異質接面電晶體基極中加入量子阱,使其電晶體同時具有光與電輸出的能力,稱為量子阱-異質接面電晶體或發光電晶體。在溫度感測機制上,我們建立溫度相依少數載子控制模型,建立各個對溫度相依時間項模擬,包括載子複合時間(Recombination lifetime)、逃脫時間(Escape time)、捕捉時間(Capture time)、及過渡時間 (Transit time)。量子阱-電晶體與一般異質接面電晶體在電流增益對溫度的感應機制具有完全相反特性,由於量子阱具有載子儲存功能,因此當溫度增加時,具有較快熱速率與能量的載子逃脫時間下降,因而逃脫量子阱的束縛被集極收集,進而提升電流增益。透過此模型我們可將實驗數據與理論互相搭配可得其電流增益對溫度機制特性曲線,再者模擬不同量子阱結構大小與量子阱在基極中相對位置,設計對溫度敏感性與線性度較高結構的量子阱電晶體,可應用於未來溫度感測器上。
發光電晶體之結構除了具有光源的應用外也同時兼具吸收光源的能力,因此可當成光電晶體(Heterojunction phototransistor),利用基極與集極的接面當成光吸收層,分析光電流隨不同光注入與電流注入之下的特性曲線,並對元件結構進行設計並了解其電流增益與光響應度的影響,藉由基極電流注入其光響應度可達1.26 A/W。再者利用發光電晶體設計以光訊號為基礎,設計元件電路布局將其組成Invertor閘/NAND閘、NOR/OR閘。以雷射光源作為訊號輸入端並分析其在不同供應電源與不同光強度下其電路的暫態特性,若能更進一步地改善元件電路RC特性以減少延遲時間,則可使光電邏輯電路運用更加廣泛。
In this thesis, we divide the investigations into two parts of (1) the thermal mechanism and (2) the electrical-optical logic applications for Light Emitting Transistor (LET). The embedded QW in the base region is employed to the Heterojunction Bipolar Transistor (HBT) which is refers to as Quantum-Well Heterojunction Bipolar Transistor (QW-HBT) possesses optical and electrical characteristics simultaneously. From the thermionic emission effects, the current gain increases in the experimental data and we investigate and build a temperature dependent charge control model for QW-HBT. With increasing the temperature, the current gain of the QW-HBT increases which is contrast to conventional HBT. The temperature charge control model describes the relation of each carrier time and temperature and the most significant impact to current gain is escape time. The simulated results could be high in agreement with the experimental data. Moreover, we design the layer structure of QW-HBT by modulating the various QW sizes and the lengths where emitter to QW. For the purpose of optimizing the temperature sensitivity and linearity, the QW-HBT could be applied for temperature sensing in the future.
In the second stage, the light emitting transistor (LET) with unique characteristics to function as an optical transmitter and receiver. The LET could also work as a heterojunction phototransistor (HPT) which is experimentally studied to be utilized to electrical-optical gate applications. We investigate the DC characteristics of the HPT under different optical injections and the different emitter sizes affect on the responsivity and current gain. To demonstrate an optical gate named as inverter/NAND, The Inverter gate possesses the base mesa region, the absorption region, as an optical input and the collector port as an electrical output. With designing a second emitter port in the HPT, an extra electrical input port can be provides. Therefore, the invertor circuit could be treated as a NAND gate. In other case, with the integration of HPT and LET, an extra optical output port in OR/NOR circuit could be realized. The electrical output truth values of the LET in the logic circuit are contrast to the optical output do. Therefore, the circuit configuration of optical gate has dual output characteristics where one is function as NOR (electrical) and the other is worded as OR (optical). In the future, we could improve the RC delay of the optical-electrical circuit and replace the light emitter transistor with the transistor laser for the enhancement of optical signal. This thesis presents promising optical logic applications for LETs, hoping to contribute to the development of the optoelectronic integrated circuits (OEICs).
口試委員會審定書 #
誌謝 i
中文摘要 ii
ABSTRACT iii
CONTENTS v
LIST OF FIGURES viii
LIST OF TABLES xiv
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Light Emitting Transistors 3
Chapter 2 Temperature Dependent Charge Control Model for Quantum-Well Based Heterojunction Bipolar Transistor 4
2.1 Motivation and Purpose 4
2.2 Basic Physics Principles 6
2.2.1 Diffusion Equations of the HBT 6
2.2.2 Diffusion Equations of the QW-HBT 10
2.2.3 Capture and Escape Time 15
2.2.4 Modified Thermionic Emission 17
2.3 The Epitaxial Structure of the QW-HBT 22
2.4 Experimental Results of the QW-HBT 23
2.5 Simulated Results of the QW-HBT Compared to the HBT 25
2.5.1 Carrier Escape, Capture and Recombination Time 25
2.5.2 Mobility, Diffusion Coefficient and Transit Time 27
2.6 Temperature Sensitivity on Different Layer Structures of the QW-HBT 30
2.6.1 Different QW-widths 30
2.6.2 Different Emitter to QW Lengths 33
Chapter 3 Heterojunction Phototransistors 35
3.1 Motivation and Purpose 35
3.2 Operation Principles of the Circuit 36
3.3 Responsivity and Optical Gain 38
3.4 DC Characteristics Under Different Illuminations 39
3.4.1 I-V Characteristics 39
3.4.2 Gummel Plot Characteristics 41
3.4.3 Family Curves Characteristics 43
3.5 DC Characteristics Under Different Geometrical Layouts 47
3.5.1 Family Curves Characteristics 47
3.5.2 Current Gain, Responsivity and Optical Gain 49
Chapter 4 Design of the Optical Logic Gate Using the Heterojunction Phototransistors and the Light Emitting Transistor 51
4.1 Motivation and Purpose 51
4.2 Fabrication Flow 52
4.3 Measurement Setup 54
4.4 Inverter/ NAND 57
4.4.1 Optical Logic and Layout Design 57
4.4.2 DC Characteristics 60
4.4.3 Supply-Voltage-Related Transient Characteristics 61
4.4.4 Optical-illuminances-related Transient Characteristics 63
4.4.5 Frequency Characteristics 64
4.4.6 Logical Operation of the NAND Gate 65
4.5 NOR/OR Gate 68
4.5.1 Optical Logic and Layout Design 68
4.5.2 DC Characteristics 69
4.5.3 Transient Characteristics and Logical Operation 71
Chapter 5 Conclusion 75
REFERANCES 77
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