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[1] D. Culler, EECS 150 - Components and Design Techniques for Digital Systems, Electrical Engineering and Computer Sciences University of California, Berkeley. [2] N. S. T. T. J. I. Hiroki Noguchi, Kazutaka Ikegami and S. Fujita., “Highly reliable and low-power nonvolatile cache memory with advanced perpendicular stt-mram for high-performance cpu.,” VLSI Circuits Digest of Technical Papers, 2014 Symposium on, pp. 1 – 2, 10-13 June 2014. [3] Alex, Raspberry Pi2–Power and Performance Measurement, 2015 (accessed February 3, 2015). [4] J. Quigley., “Micron dram products overview.,” August 27, 2013. [5] M. Technology., “4gb: x16, x32 mobile lpddr2 sdram s4 features.,” 2011. [6] T. Pathak, What is the difference between TLB and MMU in OS?, 25 Jan 2014. [7] M. vicente, Page table, 05:12, 11 January 2010.
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