臺灣博碩士論文加值系統

近年來大量的消費型電子產品與半導體技術不斷的快速演進，交換式電源供應器也因應電子技術的需求，朝向高效率、高密度、高頻化的發展。數位交換式電源供應器不需要額外的補償元件，並且具備了靈活性(flexibility)與可調性(adjustability)的優勢，並且在數位控制上更容易實現進階的控制方法，可以使暫態響應更快速更穩定。
本論文以Xilinx公司所推出的 Virtex 5 系列FPGA (XC5VLX110T)為核心，實現了一個數位高頻降壓型轉換器。當輸入4 V ~ 6 V時，輸出電壓為1.8 V，輸出電流為1 A，操作於連續導通模式，並使用了電壓回授控制。提出的轉換器以延遲環型架構為主，在1 MHz的低系統時脈需求下，以較少的資源，實現了1 MHz切換頻率、9位元解析度的數位脈波調變器。在實現上使用手動佈局的方法增加精確性。設計完成的轉換器，經由FPGA實際量測的結果顯示：輸出電壓沒有發生極限環震盪，並在不同的輸入電壓下，皆穩定輸出於1.8 V，且正確輸出相對應的脈波寬度。於電子負載250 mA ~ 1 A的測試下，超越量約為90 mV，並大約能於20 μs穩定輸出電壓。

With the rapid evolution of consumer electronics and semiconductor technology in recent years, the design of switching power supplies is also tended to high-density, high-efficiency, and high-frequency. By implementing the controller of the switching power supply in a digital way, the resulting switching power supply not only can be implemented without external compensation circuits, but also has the advantages of flexibility and adjustability. In addition, with the digital controller, it makes easier to apply the advanced control technique, and the resulting converter has a faster transient response and is more stable.
The digital high-frequency buck converter designed is verified with a Xilinx Virtex5 series FPGA (XC5VLX110T) device. To make the DPWM more accurate, the DPWM is designed and implemented by the delay-ring architecture with a meticulously manual place & route. It results in a 9-bit resolution and operates at 1-MHz system clock frequency. The verification results of the FPGA device are: The output voltage recovers in 20 μs with a 90-mV voltage drop when the dynamic load rises from 250 mA to 1000 mA; the output voltage is stable at 1.8 V as the input voltage changes from 4 V to 6 V.

第一章 序論 1
1.1研究背景與動機 1
1.2研究方向 2
1.3章節編排 3
第二章 降壓型直流轉換器的背景介紹 4
2.1 降壓型直流轉換器拓撲架構 4
2.2 降壓型直流轉換器之連續導通模式與邊界條件 7
2.3同步與非同步型降壓式轉換器之比較 12
2.4降壓型直流轉換器之數學模型建構 13
2.4.1狀態空間平均法之分析步驟 13
2.4.2降壓型轉換器之模型建立 16
第三章 數位脈波寬度調變器基本介紹 23
3.1 類比脈波寬度調變器之運作原理 23
3.2 數位脈波寬度調變器之原理與架構介紹 24
3.2.1 計數型數位脈波調變器 25
3.2.2 延遲線型數位脈波調變器 26
3.2.3 混合型數位脈波調變器 28
第四章 數位補償器設計原理 32
4.1 控制系統穩定性介紹 32
4.2 PID控制法 34
4.3 頻率響應設計法 37
4.4 類比控制器的數位實作方法 40
第五章 以FPGA設計與實現降壓型直流轉換器 43
5.1 系統規格與設計 43
5.2 FPGA架構與設計規劃 45
5.2.1設計規劃 45
5.2.2 FPGA架構特色與設計流程 47
5.3補償器設計 49
5.4 數位脈波調變器於FPGA之設計 54
第六章 模擬結果與實際驗證 59
6.1 實驗架構與系統參數 59
6.2 數位脈波調變器 61
6.3 數位補償器於PowerSIM的模擬 65
6.4 實際電路測試 66
第七章 結論 71
參考文獻 72

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