臺灣博碩士論文加值系統

定向自組裝多圖案混合式微影(directed selfassembly technology with multiple patterning lithography)非常適用於製造 10 奈米以下的導通孔層(contact/via layer)。然而，先前的相關研究只使用多圖案微影及一種嵌段共聚物(block copolymer)，導致可使用的引導模板(guiding templates)的種類被限制，導通孔層的可製造性因此不能有效提高。為了解決這個問題，多種嵌段共聚物配合多圖案微影之混合方法被提出，幫助定向自組裝相容的圖案匹配更有彈性。本論文中，我們提出第一個工作，使用多種嵌段共聚物，同時處理定
向自組裝-多圖案微影混合技術中的引導模板分配及佈局分解(layout decomposition)問題。我們分別提出一個保證最佳性基於整數線性規劃的演算法和一個較有效率基於經驗法則的演算法。實驗結果顯示相較於只使用一種嵌段共聚物的先前研究，採取兩種嵌段共聚物能夠大幅較低衝突(conflict)數量。此外，提出的經驗演算法也能有效率得到好的解。

In sub 10-nm technology nodes, the directed selfassembly technology with multiple patterning lithography (DSA-MP) is a promising solution for contact/via layer fabrication. However, previous studies using multiple patterning with a single block copolymer (BCP) material still suffer from low via manufacturability due to limited types of feasible guiding templates. To mitigate the problem, multiple patterning in combination with two different BCP materials has been proposed, which
contributes to more flexible DSA-compatible pattern matching. In this paper, we propose the first work of simultaneous guiding template assignment and layout decomposition with multiple BCP materials for general via layouts in DSA-MP. An optimal integer linear programming (ILP) formulation and a practical and sophisticated heuristic algorithm are proposed. Experimental results indicate that adopting
two different BCP materials can greatly reduce conflict numbers compared with existing works using a single BCP material, and the proposed heuristic method can efficiently obtain good solutions.

Abstract (Chinese) ii
Abstract iv
List of Tables viii
List of Figures ix
Chapter 1. Introduction 1
1.1 Multiple Patterning Lithography . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Directed Self-Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 DSA-MP hybrid lithography . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.5 Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.6 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 2. Graph Model and Problem Formulation 12
2.1 Graph Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Chapter 3. An Optimal ILP-based Algorithm 16
3.1 ILP Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 ILP Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Chapter 4. An Efficient Graph-Based Algorithm 24
4.1 Graph Simplication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2 Pre-Coloring using Preferred Grouping . . . . . . . . . . . . . . . . . . . 26
4.3 Pre-Coloring-aware Mask Assignment . . . . . . . . . . . . . . . . . . . . 30
4.4 Grouping Refinement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Chapter 5. Experimental Results 35
5.1 Results for ISPD 2015 Placement Contest benchmarks . . . . . . . . . . . 36
5.2 Results for MCNC benchmarks . . . . . . . . . . . . . . . . . . . . . . . 36
Chapter 6. Conclusions and Future Work 43
Bibliography 44

[1] Y. Badr, A. Torres, Y. Ma, J. Mitra and P. Gupta, "Incorporating DSA in multipatterning semiconductor manufacturing technologies," in Proceedings of SPIE, vol. 9427, pp. 94270P, 2015.
[2] Y. Badr, A .Torres and P .Gupta, "Mask assignment and synthesis of DSA-MP hybrid lithography for sub-7nm contacts/vias," in Proceedings of ACM/IEEE Design Automation Conference (DAC), 2015.
[3] I. S. Bustany, D. Chinnery, Joseph R. Shinnerl and V. Yutsis, "ISPD 2015 benchmarks with fence regions and routing blockages for detailedrouting-driven placement," in Proceedings of ACM International Symposium on Physical Design (ISPD), Monterey, 2015.
[4] Y. Du, D. Guo, Martin D. F. Wong, H. Yi, H.-S. Philip Wong, H. Zhang and Q. Ma, "Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library," in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013.
[5] S.-Y. Fang, Y.-W. Chang, and W.-Y. Chen. "A novel layout decomposition algorithm for triple patterning lithography." in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 33, no. 3, pp. 397-408, 2014.
[6] R. Gronheid, J. Doise, J. Bekaert, Boon Teik Chan, I. Karageorgos, J. Ryckaert, G. Vandenberghe, Y. Cao, G.Lin, M. Somervel, G. Fenger and D. Fuchimoto, "Implementation of templated DSA for via layer patterning at the 7nm node," in Proceedings of SPIE, vol. 9423, pp. 942305, 2015.
[7] D. Herr, "The extensibility of optical patterning via directed selfassembly of nano-engineered imaging materials," Future Fab International (www.futurefab.com), vol. 18, 2005.
[8] I. Karageorgos, J. Ryckaert, Maryann C. Tung, H.-S. P. Wong, R. Gronheid, J. Bekaert, E. Karageorgos, K. Croes, G. Vandenberghe, M. Stucchi and W. Dehaene, "Design strategy for integrating DSA via patterning in sub-7nm interconnects," in Proceedings of SPIE, vol. 9781, pp. 97810N, 2016.
[9] J. Kuang, J. Ye and Evangeline F. Y. Young, "Simultaneous template optimization and mask assignment for DSA with multiple patterning," in Proceedings
of Asia and South Pacific Design Automation Conference (ASPDAC), 2016.
[10] A.B. Kahng, C.H. Park, X. Xu, and H. Yao, "Layout decomposition for double patterning lithography," in IEEE Transactions on Computer-Aided Design of
Integrated Circuits and Systems (TCAD), pp. 939-952, 2010.
[11] Y. Ma, J. Andres Torres, G. Fenger, Y. Granik, J. Ryckaert, G. Vanderberghe, J. Bekaert and J. Word, "Challenges and opportunities in applying grapho-epitaxy DSA lithography to metal cut and contact/via applications," in Proceedings of SPIE, 2014.
[12] R. Ruiz, H. Kang, François A. Detcheverry, E. Dobisz, Dan S. Kercher, Thomas R. Albrecht, Juan J. de Pablo and Paul F. Nealey, "Density multiplication and improved lithography by directed block copolymer assembly," in Proceedings of Science, vol. 321, no. 5891, pp. 936939, 2008.
[13] Z. Xiao, Y. Du, H. Tian, Martin D. F. Wong, H. Yi and H.-S. Philip Wong, "DSA template optimization for contact layer in 1D standard cell design," in Proceedings of SPIE, vol. 9049, pp. 904920, 2014.
[14] Z. Xiao, C.-X. Lin, Martin D.F. Wong and H. Zhang, "Contact layer decomposition to enable dsa with multi-patterning technique for standard cell based layout, " in Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC), 2016.
[15] B. Yu, K. Yuan, B. Zhang, D. Ding, and D. Z. Pan, "Layout decomposition for triple patterning lithography." in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2011.
[16] H. Yao, Y. Cai, and W. Zhao, "A matching based decomposer for double patterning lithography," in IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp. 1-4, 2012.
[17] Gurobi Optimizer. https://www.gurobi.com