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研究生:簡順榮
研究生(外文):Jian, Shuen-Rung
論文名稱:非晶矽薄膜電晶體窄邊框全時段抗雜訊面板閘極驅動器
論文名稱(外文):Narrow Bezel Full Time Anti-Noise LCD Gate Driver on Array with A-Si TFT Process
指導教授:劉柏村劉柏村引用關係
指導教授(外文):Liu, Po-Tsun
口試委員:戴亞翔
口試委員(外文):Tai, Ya-Hsiang
口試日期:2018-07-20
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電機學院電子與光電學程
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2018
畢業學年度:106
語文別:中文
論文頁數:51
中文關鍵詞:面板閘極驅動器
外文關鍵詞:panel gate driver
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現在面板驅勢多偏重於輕巧與高解析度,但是市場需要高競爭力的產品,效能已經不是最大考量,本論文所提電路是用便宜的非晶矽薄膜電晶體製程(Amorphous Silicon Thin Film Transistor,簡稱A-Si)設計出高解析度且輕巧的液晶面板並用負偏壓原理來延長產品生命週期,在奈米製程中雜訊一直是影響電路的重要因素,因此本電路技術有全時間抗雜訊功能來穩定訊號輸出。
  本論文設計面板的閘極(掃描線)驅動電路,電路架構包含:輸入端、共用型預驅動電路、全時段雜訊清除器以及掃描線輸出部件,其中共用型預先驅動電路主要功能為大幅縮小晶片面積,達成在27吋面板窄邊框規格 < 3mm;其中的全時間雜訊清除器由正半週、負半週抗雜訊電路組成,以達到全時間抗雜訊功能;並於準備模式中讓負責輸出的電晶體其VGS保持負偏壓延長產品生命。
Nowadays, the panel drivers tend to focus on light weight and high resolution. However, the market needs highly competitive products. The performance is not the biggest consideration. The proposed circuit is to use a cheap amorphous silicon thin film transistor (A-Si) to design a high-resolution and lightweight LCD panel and use a negative bias principle to extend the product life cycle. In the nano-process, noise is always an important factor affecting the circuit, so my proposed circuit has full-time anti-noise function to stabilize the signal output.
This paper designs the gate (scanning line) driver circuit of the panel. The circuit architecture includes: input terminal, shared pre-driver circuit, full-time noise cleaner and scan line output component. The main function of the shared pre-driver circuit is significantly reduce the chip area to achieve a narrow frame size of <3mm on the 27" panel; the full-time noise cleaner consists of a positive half-cycle and a negative half-cycle anti-noise circuit to achieve full-time anti-noise function; In the standby mode, the transistor responsible for the output maintains its VGS with a negative bias to extend the life of the product.
目錄
 
中文摘要 I
Abstract II
致謝 IV
第一章 序論 1
1-1 研究動機 1
1-2 論文架構 1
第二章 液晶面板介紹 2
2-1 什麼是液晶 2
2-2 液晶應用於顯示螢幕 2
2-3 畫素液晶電路概念 3
第三章 非晶矽薄膜電晶體製程介紹 5
3-1 薄膜電晶體趨勢 5
3-2 非晶矽薄膜電晶體製程優勢 5
3-3 薄膜電晶體元件特性 7
3-4 非晶矽薄膜電晶體元件可靠度 8
第四章 液晶面板閘極驅動電路 11
4-1 液晶面板驅動系統 11
4-2 掃描驅動電路Gate driver circuit 12
4-3 Gate Driver on Array ( GOA )介紹 14
4-4 面板的干擾源 14
第五章 GOA電路設計與創新 17
5-1基本GOA電路設計及數種GOA設計 17
5-2 本論文 非晶矽薄膜電晶體窄邊框全時段抗雜訊面板閘極驅動器 30
5-3 模擬結果 37
5-4 本論文與文獻[17]比較使用面積 43
第六章 晶片佈局、量測與結論 45
6-1 晶片佈局與量測 45
6-2 結論 48
參考文獻 49
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[2] Y. Kuo, Thin Film Transistors: Materials and Processes, vol. 1, Kluwer, 2004.
[3] D. J. R. Cristaldi, S. Pennisi, F. Pulvirenti, “Liquid Crystal Display Drivers: Techniques and Circuits”, Springer, Mar. 2009.
[4] T. C. Lu, H. W. Zan, M. D. Ker, “Temperature coefficient of poly-silicon TFT and its application on voltage reference circuit with temperature compensation in LTPS process,” IEEE Transaction on Electron Devices, vol. 55, no. 10, pp. 2583-2589, Oct. 2008.
[5] Y. H. Tai, C. C. Pai, B. T. Chen, and H. C. cheng, “A source-follower type analog buffer using poly-Si TFTs with large design windows,” IEEE Electron Device Letters, vol. 26, no. 11, pp. 811-813, Nov. 2005.
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[7] M. Powell, “The physics of amorphous-silicon thin-film transistors,” IEEE Transaction on Electron Devices, vol. 36, no. 12, pp. 2753-2763, Dec. 1989.
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[9] J. W. Choi, J. I. Kim, S. H. Kim, and J. Jang, “Highly reliable amorphous silicon gate driver using stable center-offset thin-film transistors,” IEEE Transaction on Electron Devices, vol. 57, no. 9, pp. 2330-2334, Sep. 2010.
[10] I. Janossy, and T. Kosa, “Laser-induced effects in dyed nematics,” Molecular Crystals and Liquid Crystals 207(1),189-197 (1991).
[11] 田民波,TFT 液晶顯示原理與技術,林欣怡校訂,五南,台北,民國九十七年。
[12] P.-T. Liu, Silicon-based Thin-film Transistor Technologies, National Chiao Tung University, Taiwan, R. O. C.
[13] C.-L. Lin, H.-D. Tu, C.-E. Wu, C.-C. Hung, K.-J. Gan, J.-W. Chou, “Low-Power Gate Driver Circuit for TFT-LCD Application,” IEEE Transaction on Electron Devices, vol. 59, no. 5, May 2012.
[14] Y. H. Tai, Design and Operation of TFT-LCD Panels, Wu-Nan Book, Inc., Apr. 2006.
[15] H.-W. Liu, C.-H. Lin, F.-H. Wang, “Recovery Characteristics of Threshold Voltage Degradation for Hydrogenated Amorphous Silicon Thin-film Transistors under DC Bias Stresses,” Next-Generation Electronics (ISNE), 2016 5th International Symposium on. IEEE, pp. 2, May 2016.
[16] D. Zhou, M. Wang, X. Lu, J. Zhou, “Drain Bias Stress-Induced Degradation in Amorphous Silicon Thin-film Transistors with Negative Gate Bias,” 18th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), pp. 1-3, July 2011.
[17] Y.-J. Chen, H.-C Chang, C.-Y. Yen, W.-Y. Wu, C.-H. Yu, “7.0 inch a-Si:H TFT-LCD with Stable Integrate Gate Driver,” HannStar Panel Design Department Product Development Division, Tainan, Taiwan, pp. 1-2.
[18] C.-L. Lin, C.-D. Tu, M.-C. Chuang, and J.-S. Yu, “Design of Bidirectional and Highly Stable Integrated Hydrogenated Amorphous Silicon Gate Driver Circuits,” Journal of Display Technology, vol. 7 ,pp. 2-4, Jan. 2011.
[19] J.-S. Kim, and B.-D. Choi, “A new Decoder-type Integrated Gate Driver with a-Si: H TFTs for Active-matrix Displays,” J Japanese Journal of Applied Physics, vol 53, pp. 2-5, Jan 2014.
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