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研究生:翁立
研究生(外文):Wong, Le
論文名稱:應用於先進製程標準元件之可移動式格點的
高品質迷宮繞線
論文名稱(外文):A High-Quality Maze Routing Algorithm with Adjustable Gridlines for Standard Cell Synthesis
指導教授:李毅郎
指導教授(外文):Li, Yih-Lang
口試委員:吳凱強李育民
口試委員(外文):Wu, Kai-ChiangLee, Yu-Min
口試日期:2017-10-25
學位類別:碩士
校院名稱:國立交通大學
系所名稱:資訊科學與工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:106
語文別:中文
論文頁數:42
中文關鍵詞:積體電路設計電路設計自動化繞線標準元件庫迷宮繞線可移動式格點
外文關鍵詞:VLSIEDAroutingstandard cellmaze routing algorithmadjustable gridlines
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隨著製程不斷演進,基於可製造性的考量在積體電路設計的限制也變得更加大量且複雜。其中標準元件為組成電路的基礎,因此設計高品質的標準元件有助於產生更優良的電路。既有的標準元件佈局繞線演算法中廣泛使用格點式繞線,產生在格點上的金屬線段(on-grid metal)。然而,由可製造性設計規範帶來的繞線空間變小以及限制增加,不可避免必須使用一些偏離格線的金屬線段(off-grid metal)以有效爭取可用的繞線資源。本篇論文中我們提出一個可移動式格點的迷宮繞線演算法,對於標準元件可以同時兼容on-grid與off-grid的金屬線段進行繞線。實驗結果透過電路佈局驗證及設計規則驗證判斷成敗,其顯示使用可以移動式格點的繞線方法可以使15.3%的標準元件佈局由失敗改善為成功,同時在Metal 1與Metal 2有1.7% 及 11.1% 的線長改善,並改進標準元件品質。
With the advance of technology nodes, complex and huge numbers of design rules are developed to restrict integrated circuit (IC) designs under the considerations of design for manufacturability (DFM). Standard cells are the basic components of IC designs, and highly impact the quality of IC designs. Recently, grid-based routing is widely adopted in standard cell routing. However, off-grid routing is still necessary to solve design rule violations due to limited routing resource and increasing DFM restriction. In this paper we propose a maze routing algorithm with adjustable gridlines that can be on-gird and off-grid wires to complete high quality routing. The results examined by LVS and design rule check (DRC) show that proposed routing algorithm can increase success rate by 15.3%, improve Metal 1 and Metal 2 wirelength by 1.7% and 11.1%, and improve the standard cell quality.
摘要 I
ABSTRACT II
Acknowledgement III
Contents IV
圖表目錄 V
表格目錄 VII
Chapter 1. Introduction 1
Chapter 2. Preliminary 4
2.1 Cell Layout Structure 4
2.2 Problem Formulation 8
2.3 Design Rules 9
2.4 Cell Layout Synthesis Flow 10
Chapter 3. Maze Routing with Adjustable Gridlines Mechanism 11
3.1 Adjustable Routing Grid Model 13
3.2 Pin Metal Switching Strategy 21
3.3 Routing Cost Model 26
3.4 Post Maze Routing Optimization 34
Chapter 4. Experiments 35
Chapter 5. Conclusion 40
References 41
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